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CY7C1300A Datasheet

  • CY7C1300A

  • Memory

  • 12頁(yè)

  • ETC

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CY7C1300A
128K X 36 Dual I/O Dual Address Synchronous SRAM
Features
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Fast clock speed: 100 and 83 MHz
Fast access times: 5.0/6.0 ns max.
Single clock operation
Single 3.3V 鈥?% and +5% power supply V
CC
Separate V
CCQ
for output buffer
Two chip enables for simple depth expansion
Address, data input, CE1X, CE2X, CE1Y, CE2Y, PTX,
PTY, WEX, WEY, and data output registers on-chip
Concurrent Reads and Writes
Two bidirectional data buses
Can be configured as separate I/O
Pass-through feature
Asynchronous output enables (OEX, OEY)
LVTTL-compatible I/O
Self-timed Write
Automatic power-down
176-pin TQFP package
The CY7C1300A allows the user to concurrently perform
Reads, Writes, or pass-through cycles in combination on the
two data ports. The two address ports (AX, AY) determine the
Read or Write locations for their respective data ports (DQX,
DQY).
All input pins except output enable pins (OEX, OEY) are gated
by registers controlled by a positive-edge-triggered clock
(CLK) input. The synchronous inputs include all addresses,
data inputs, depth-expansion chip enables (CE1X, CE2X,
CE1Y and CE2Y), pass-through controls (PTX and PTY), and
Read鈥揥rite control (WEX and WEY).
The pass-through feature allows data to be passed from one
port to another, in either direction. The PTX input must be
asserted to pass data from port X to port Y. The PTY will
likewise pass data from port Y to port X. A pass-through
operation takes precedence over a Read operation.
When AX and AY are the same, certain protocols are followed.
If both ports are Read, the reads occur normally. If one port is
written and the other is read, the read from the array will occur
before the data is written. If both ports are written, only the data
on DQY will be written to the array.
The CY7C1300A operates from a +3.3V power supply. All
inputs and outputs are LVTTL-compatible. These dual I/O,
dual address synchronous SRAMs are well suited for ATM,
Ethernet switches, routers, cell/frame buffers, SNA switches,
and shared memory applications.
The CY7C1300A needs one extra cycle after power for proper
power-on reset. The extra cycle is needed after V
CC
is stable
on the device.
This device is available in a 176-pin TQFP package.
Logic Block Diagram
[1]
Functional Description
The CY7C1300A SRAM integrates 131,072 脳 36 SRAM cells
with advanced synchronous peripheral circuitry. It employs
high-speed, low-power CMOS designs using advanced
triple-layer polysilicon, double-layer metal technology. Each
memory cell consists of four transistors and two high-valued
resistors.
Y
Note:
1. For 128K x 36 devices, AX and AY are 17-bit-wide buses.
Cypress Semiconductor Corporation
Document #: 38-05075 Rev. *C
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3901 North First Street
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San Jose
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CA 95134 鈥?408-943-2600
Revised January 19, 2003

CY7C1300A相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int...
    Cypress
  • 英文版
    16K x 16/18 Dual-Port Static RAM
    Cypress
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...

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