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CY7C1069DV33-10ZSXI Datasheet

  • CY7C1069DV33-10ZSXI

  • 16-Mbit (2M x 8) Static RAM

  • 10頁

  • CYPRESS

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CY7C1069DV33
16-Mbit (2M x 8) Static RAM
Features
鈻?/div>
Functional Description
The CY7C1069DV33 is a high performance CMOS Static RAM
organized as 2,097,152 words by 8 bits.
To write to the device, take Chip Enables (CE
1
LOW and CE
2
HIGH) and Write Enable (WE) input LOW. Data on the eight IO
pins (IO
0
through IO
7
) is then written into the location specified
on the address pins (A
0
through A
20
).
To read from the device, take Chip Enables (CE
1
LOW and CE
2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. Under these conditions, the contents of the
memory location specified by the address pins will appear on the
IO pins. See
Truth Table
on page 8 for a complete description of
Read and Write modes.
The input and output pins (IO
0
through IO
7
) are placed in a high
impedance state when the device is deselected (CE
1
HIGH or
CE
2
LOW), the outputs are disabled (OE HIGH), or during a write
operation (CE
1
LOW, CE
2
HIGH, and WE LOW).
The CY7C1069DV33 is available in a 54-pin TSOP II package
with center power and ground (revolutionary) pinout, and a
48-Ball very fine pitch ball grid array (VFBGA) package.
High speed
鉂?/div>
t
AA
= 10 ns
Low active power
鉂?/div>
I
CC
= 175 mA at 10 ns
Low CMOS standby power
鉂?/div>
I
SB2
= 25 mA
Operating voltages of 3.3 鹵 0.3V
2.0V data retention
Automatic power down when deselected
TTL compatible inputs and outputs
Easy memory expansion with CE
1
and CE
2
features
Available in Pb-free 54-Pin TSOP II and 48-Ball VFBGA
packages
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
鈻?/div>
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
ROW DECODER
SENSE AMPS
2M x 8
ARRAY
IO
0
鈥?IO
7
COLUMN
DECODER
WE
CE
2
OE
CE
1
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
A
19
A
20
Cypress Semiconductor Corporation
Document Number: 38-05478 Rev. *D
鈥?/div>
198 Champion Court
鈥?/div>
San Jose
,
CA 95134-1709
鈥?/div>
408-943-2600
Revised September 06, 2007

CY7C1069DV33-10ZSXI 產(chǎn)品屬性

  • CY7C1069DV33

  • 108

  • 集成電路 (IC)

  • 存儲(chǔ)器

  • -

  • RAM

  • SRAM - 異步

  • 16M(2M x 8)

  • 10ns

  • 并聯(lián)

  • 3 V ~ 3.6 V

  • -40°C ~ 85°C

  • 54-TSOP(0.400",10.16mm 寬)

  • 54-TSOP II

  • 管件

  • 428-2959-5CY7C1069DV33-10ZSXI-ND

CY7C1069DV33-10ZSXI相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int...
    Cypress
  • 英文版
    16K x 16/18 Dual-Port Static RAM
    Cypress
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...

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