CY7C0430CV Datasheet

IC型號(hào)：
CY7C0430CV
PDF描述：
Cypress Semiconductor [10 Gb/s 3.3V QuadPort⑩ DSE Family]
文件大?。?/label>
940.21KB
芯片廠家：
CYPRESS

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CY7C0430BV

CY7C0430CV

10 Gb/s 3.3V QuadPort鈩?DSE Family

Features

鈥?QuadPort鈩?datapath switching element (DSE) family

allows four independent ports of access for data path

management and switching

鈥?High-bandwidth data throughput up to 10 Gb/s

鈥?133-MHz

[1]

port speed x 18-bit-wide interface 脳 4 ports

鈥?High-speed clock to data access 4.2 ns (max.)

鈥?Synchronous pipelined device

鈥?1-Mb (64K 脳 18) switch array

鈥?0.25-micron CMOS for optimum speed/power

鈥?IEEE 1149.1 JTAG boundary scan

鈥?Width and depth expansion capabilities

鈥?BIST (Built-In Self-Test) controller

鈥?Dual Chip Enables on all ports for easy depth expansion

鈥?Separate upper-byte and lower-byte controls on all

ports

鈥?Simple array partitioning

鈥?Internal mask register controls counter wrap-around

鈥?Counter-Interrupt flags to indicate wrap-around

鈥?Counter and mask registers readback on address

鈥?272-ball BGA package (27-mm 脳 27-mm 脳 1.27-mm ball

pitch)

鈥?Commercial and industrial temperature ranges

鈥?3.3V low operating power

鈥?Active = 750 mA (maximum)

鈥?Standby = 15 mA (maximum

QuadPort DSE Family Applications

PORT 1

PORT 3

PORT 2

PORT 4

BUFFERED SWITCH

PORT 2

PORT 1

PORT 3

PORT 4

REDUNDANT DATA MIRROR

Note:

1. f

MAX2

for commercial is 135 MHz and for industrial is 133 MHz.

Cypress Semiconductor Corporation

Document #: 38-06027 Rev. *B

鈥?/div>

198 Champion Court

鈥?/div>

San Jose

CA 95134-1709

鈥?/div>

408-943-2600

Revised May 23, 2006

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