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CY7C028V-25AXC Datasheet

  • CY7C028V-25AXC

  • 3.3V 32K/64K x 16/18 Dual-Port Static RAM

  • 18頁(yè)

  • CYPRESS

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Pb
LEAD-FREE
CY7C027V/028V
CY7C037V/038V
3.3V 32K/64K x 16/18 Dual-Port Static RAM
Features
鈥?True Dual-Ported memory cells which allow
simultaneous access of the same memory location
鈥?32K x 16 organization (CY7C027V)
鈥?64K x 16 organization (CY7C028V)
鈥?32K x 18 organization (CY7C037V)
鈥?64K x 18 organization (CY7C038V)
鈥?0.35-micron CMOS for optimum speed/power
鈥?High-speed access: 15/20/25 ns
鈥?Low operating power
鈥?/div>
Active: I
CC
= 115 mA (typical)
鈥?Standby: I
SB3
= 10
碌A(chǔ)
(typical)
鈥?Fully asynchronous operation
鈥?Automatic power-down
鈥?Expandable data bus to 32/36 bits or more using Mas-
ter/Slave chip select when using more than one device
鈥?On-chip arbitration logic
鈥?Semaphores included to permit software handshaking
between ports
鈥?INT flag for port-to-port communication
鈥?Separate upper-byte and lower-byte control
鈥?Dual Chip Enables
鈥?Pin select for Master or Slave
鈥?Commercial and Industrial temperature ranges
鈥?100-pin Lead(Pb)-free TQFP and 100-pin TQFP
Logic Block Diagram
R/W
L
UB
L
R/W
R
UB
R
CE
0L
CE
1L
LB
L
OE
L
CE
L
CE
R
CE
0R
CE
1R
LB
R
OE
R
I/O
8/9L
鈥揑/O
15/17L
I/O
0L
鈥揑/O
7/8L
[2]
[1]
8/9
8/9
8/9
[1]
I/O
Control
I/O
Control
8/9
I/O
8/9L
鈥揑/O
15/17R
[2]
I/O
0L
鈥揑/O
7/8R
A
0L
鈥揂
14/15L
[3]
15/16
Address
Decode
15/16
True Dual-Ported
RAM Array
Address
Decode
15/16
15/16
A
0R
鈥揂
14/15R
[3]
A
0L
鈥揂
14/15L
CE
L
OE
L
R/W
L
SEM
L
[4]
[3]
Interrupt
Semaphore
Arbitration
A
0R
鈥揂
14/15R
CE
R
OE
R
R/W
R
SEM
R
[4]
[3]
BUSY
L
INT
L
UB
L
LB
L
Notes:
1. I/O
8
鈥揑/O
15
for x16 devices; I/O
9
鈥揑/O
17
for x18 devices.
2. I/O
0
鈥揑/O
7
for x16 devices; I/O
0
鈥揑/O
8
for x18 devices.
3. A
0
鈥揂
14
for 32K; A
0
鈥揂
15
for 64K devices.
4. BUSY is an output in master mode and an input in slave mode.
M/S
BUSY
R
INT
R
UB
R
LB
R
Cypress Semiconductor Corporation
Document #: 38-06078 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised September 20, 2004

CY7C028V-25AXC 產(chǎn)品屬性

  • CY7C027V,AV,028V,037AV,038V

  • 90

  • 集成電路 (IC)

  • 存儲(chǔ)器

  • -

  • RAM

  • SRAM - 雙端口，異步

  • 1M (64K x 16)

  • 25ns

  • 并聯(lián)

  • 3 V ~ 3.6 V

  • 0°C ~ 70°C

  • 100-LQFP

  • 100-TQFP（14x14）

  • 托盤

  • 428-2103CY7C028V-25AXC-ND

CY7C028V-25AXC相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy
    Cypress
  • 英文版
    32K x 8/9 Dual-Port Static RAM
    Cypress
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS
  • 英文版
    64K/128K x 8/9 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT...
    CYPRESS [C...
  • 英文版
    4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int...
    Cypress
  • 英文版
    16K x 16/18 Dual-Port Static RAM
    Cypress
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS
  • 英文版
    32K/64K x 16/18 Dual-Port Static RAM
    CYPRESS [C...

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