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CY74FCT646T Datasheet

  • CY74FCT646T

  • Octal Registered Bus Transceivers with 3-State Outputs

  • 10頁

  • ETC

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CY54FCT646T, CY74FCT646T
8-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS031A 鈥?JULY 1994 鈥?REVISED OCTOBER 2001
D
D
D
D
D
D
D
D
D
D
D
Function, Pinout, and Drive Compatible
With FCT and F Logic
Reduced V
OH
(Typically = 3.3 V) Versions
of Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
I
off
Supports Partial-Power-Down Mode
Operation
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?200-V Machine Model (A115-A)
鈥?1000-V Charged-Device Model (C101)
Independent Register for A and B Buses
CY54FCT646T
鈥?48-mA Output Sink Current
鈥?12-mA Output Source Current
CY74FCT646T
鈥?64-mA Output Sink Current
鈥?32-mA Output Source Current
3-State Outputs
CY54FCT646T . . . D PACKAGE
CY74FCT646T . . . Q OR SO PACKAGE
(TOP VIEW)
CPAB
SAB
DIR
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
CPBA
SBA
G
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
CY54FCT646T . . . L PACKAGE
(TOP VIEW)
description
19
11
The 鈥橣CT646T devices consist of a bus
12 13 14 15 16 17 18
transceiver circuit with 3-state, D-type flip-flops,
and control circuitry arranged for multiplexed
transmission of data directly from the input bus or
from the internal registers. Data on the A or B bus
NC 鈥?No internal connection
is clocked into the registers as the appropriate
clock pin goes to a high logic level. Output-enable (G) and direction (DIR) inputs control the transceiver function.
In the transceiver mode,data present at the high-impedance port can be stored in either the A or B register, or
in both. Select controls (SAB, SBA) can multiplex stored and real-time (transparent mode) data. DIR determines
which bus receives data when G is low. In the isolation mode (G is high), A data can be stored in the B register
and/or B data can be stored in the A register.
A
1
A
2
A3
NC
A
4
A
5
A
6
5
6
7
8
9
10
DIR
SAB
CPAB
NC
V
CC
CPBA
SBA
4 3
2 1 28 27 26
25
24
23
22
21
20
G
B
1
B
2
NC
B
3
B
4
B
5
A
7
A
8
GND
NC
B
8
B
7
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
錚?/div>
2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
B
6
1

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