Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modi鏗乪d to remove devices not offered.
CY54/74FCT540T
CY54/74FCT541T
SCCS029 - May 1994 - Revised March 2000
8-Bit Buffers/Line Drivers
Functional Description
The FCT540T inverting buffer/line driver and the FCT541T
non-inverting buffer/line driver are designed to be employed as
memory address drivers, clock drivers, and bus-oriented
transmitters/receivers. The devices provide speed and drive
capabilities equivalent to their fastest bipolar logic
counterparts while reducing power dissipation. The input and
output voltage levels allow direct interface with TTL, NMOS,
and CMOS devices without external components.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Features
鈥?/div>
Function, pinout, and drive compatible with FCT and
F logic
鈥?/div>
FCT-C speed at 4.1 ns max. (Com鈥檒)
FCT-A speed at 4.8 ns max. (Com鈥檒)
鈥?/div>
Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
鈥?/div>
Edge-rate control circuitry for signi鏗乧antly improved
noise characteristics
鈥?/div>
Power-off disable feature
鈥?/div>
ESD > 2000V
鈥?/div>
Matched rise and fall times
鈥?/div>
Fully compatible with TTL input and output logic levels
鈥?Sink current
64 mA (Com鈥檒), 48 mA (Mil)
Source current
32 mA (Com鈥檒), 12 mA (Mil)
鈥?/div>
Extended commercial range of
鈭?0藲C
to +85藲C
Logic Block Diagram鈥擣CT540T
OE
A
OE
B
Pin Configurations
CERDIP/SOIC/QSOP
Top View
OE
A
1
2
3
4
5
6
7
8
9
10
FCT540T
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
Logic Block Diagram鈥擣CT541T
OE
A
OE
B
CERDIP/DIP/SOIC/QSOP
Top View
OE
A
1
2
3
4
5
6
7
8
9
10
FCT541T
20
19
18
17
16
15
14
13
12
11
V
CC
OE
B
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
Copyright
漏
2000, Texas Instruments Incorporated
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