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CY74FCT163373 Datasheet

  • CY74FCT163373

  • 16-Bit Latch

  • 6頁(yè)

  • TI

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Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modi鏗乪d to remove devices not offered.
CY74FCT163373
SCCS053 - March 1997 - Revised March 2000
16-Bit Latch
Functional Description
This device is a 16-bit, D-type latch, designed for use in bus
applications requiring high speed and low power. It can either
be used as two independent 8-bit latches, or as a single 16-bit
latch by connecting the Output Enable (OE) and Latch (LE)
inputs. The outputs are 24-mA balanced output drivers with
current limiting resistors to reduce the need for external
terminating resistors and provide for minimal undershoot and
reduced ground bounce. Flow-through pinout and small shrink
packaging aid in simplifying board layout.
The CY74FCT163373 is designed with inputs and outputs
capable of being driven by 5.0V buses, allowing its use in
mixed voltage systems as a translator. The outputs are also
designed with a power off disable feature enabling its use in
applications requiring live insertion.
Features
鈥?Low power, pin-compatible replacement for LCX and
LPT families
鈥?5V tolerant inputs and outputs
鈥?24 mA balanced drive outputs
鈥?Power-off disable outputs permits live insertion
鈥?Edge-rate control circuitry for reduced noise
鈥?FCT-C speed at 4.2 ns
鈥?Latch-up performance exceeds JEDEC standard no. 17
鈥?Typical output skew < 250 ps
鈥?Industrial temperature range of 鈥?0藲C to +85藲C
鈥?TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)
鈥?Typical
V
olp
(ground bounce) performance exceeds Mil
Std 883D
鈥?V
CC
= 2.7V to 3.6V
鈥?ESD (HBM) > 2000V
Logic Block Diagrams CY74FCT163373
1
OE
Pin Configuration
SSOP/TSSOP
Top View
1
OE
1
O
1
1
O
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
LE
1
D
1
1
D
2
1
LE
1
D
1
D
1
O
1
GND
1
O
3
1
O
4
V
CC
1
O
5
1
O
6
GND
1
D
3
1
D
4
C
V
CC
1
D
5
1
D
6
GND
GND
1
D
7
1
D
8
2
D
1
2
D
2
TO 7 OTHER CHANNELS
1
O
7
1
O
8
2
OE
2
O
1
2
O
2
GND
2
LE
2
D
1
2
O
3
2
O
4
2
O
1
GND
2
D
3
2
D
4
D
C
V
CC
2
O
5
2
O
6
V
CC
2
D
5
2
D
6
GND
2
O
7
2
O
8
2
OE
GND
2
D
7
2
D
8
2
LE
TO 7 OTHER CHANNELS
Copyright
2000, Texas Instruments Incorporated

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