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CY62148CV30LL-70BAI Datasheet

  • CY62148CV30LL-70BAI

  • 512K x 8 MoBL Static RAM

  • 13頁(yè)

  • CYPRESS

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CY62148CV25/30/33
MoBL鈩?/div>
512K x 8 MoBL Static RAM
Features
鈥?High Speed
鈥?55 ns and 70 ns availability
鈥?Low voltage range:
鈥?CY62148CV25: 2.2V鈥?.7V
鈥?CY62148CV30: 2.7V鈥?.3V
鈥?CY62148CV33: 3.0V鈥?.6V
鈥?Pin compatible with CY62148V
鈥?Ultra low active power
鈥?Typical active current: 1.5 mA @ f = 1MHz
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?Typical active current: 5.5 mA @ f = f
max
(70 ns speed)
Low standby power
Easy memory expansion with CE and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life鈩?(MoBL鈩? in por-
table applications such as cellular telephones. The device also
has an automatic power-down feature that significantly reduc-
es power consumption by 80% when addresses are not tog-
gling. The device can be put into standby mode when dese-
lected (CE HIGH).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location speci-
fied on the address pins (A
0
through A
18
).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW and WE LOW).
The CY62148CV25/30/33 are available in a 36-ball FBGA
package.
Functional Description
The CY62148CV25/30/33 are high-performance CMOS static
RAMs organized as 512K words by 8 bits. This device features
Logic Block Diagram
Data in Drivers
I/O
0
I/O
1
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
ROW DECODER
SENSE AMPS
I/O
2
I/O
3
I/O
4
I/O
5
512K x 8
ARRAY
CE
WE
OE
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
Cypress Semiconductor Corporation
Document #: 38-05035 Rev. *A
鈥?/div>
3901 North First Street
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised September 7, 2001

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