CY28400 Datasheet

IC型號：
CY28400
PDF描述：
100-MHz Differential Buffer for PCI Express and SATA
文件大?。?/label>
245.99KB
PDF頁數(shù)：
14頁
芯片廠家：
CYPRESS

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CY28400

100-MHz Differential Buffer for PCI Express and SATA

Features

鈥?CK409 or CK410 companion buffer

鈥?Four differential 0.7v clock pairs

鈥?Individual OE controls

鈥?Low CTC jitter (< 50 ps)

鈥?Programmable bandwidth

鈥?SRC_STOP# power management control

鈥?SMBus Block/Byte/Word Read and Write support

鈥?3.3V operation

鈥?PLL Bypass-configurable

鈥?Divide by 2 programmable outputs

鈥?28-pin SSOP package

Functional Description

The CY28400 is a differential buffer and serves as a

companion device to the CK409 or CK410 clock generator.

The device is capable of distributing the Serial Reference

Clock (SRC) in PCI Express and SATA implementations.

Block Diagram

Pin Configuration

DIFT1

OE_(1,6)

SRC_STOP#

PWRDWN#

Output

Control

DIFC1

DIFT2

SCLK

SDATA

SMBus

Controller

Output

Buffer

DIFC2

PLL/BYPASS#

SRCT_IN

SRCC_IN

DIFT5

DIFC5

VDD

SRCT_IN

SRCC_IN

VSS

VDD

DIFT1

DIFC1

OE_1

DIFT2

DIFC2

VDD

PLL/BYPASS#

SCLK

SDATA

VDD_A

VSS_A

IREF

VSS

VDD

DIFT6

DIFC6

0E_6

DIFT5

DIFC5

VDD

HIGH_BW#

SRC_STOP#

PWRDWN#

28 SSOP

CY28400

DIV

HIGH_BW#

DIFT6

DIFC6

PLL

Cypress Semiconductor Corporation

Document #: 38-07591 Rev. **

鈥?/div>

3901 North First Street

鈥?/div>

San Jose

CA 95134

鈥?/div>

408-943-2600

Revised November 24, 2003

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