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CY28331 Datasheet

  • CY28331

  • Clocks and Buffers

  • 17頁(yè)

  • ETC

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CY28331
Clock Generator for AMD鈩?Hammer
Features
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Supports AMD錚?Hammer CPU
Two differential pairs of CPU clocks
Eight low-skew/low-jitter PCI clocks
One free-running PCI clock
Four low-skew/low-jitter PCI/HyperTransport錚?clocks
One 48M output for USB
One programmable 24M or 48M for FDC
Three REF 14.318-MHz clocks
Dial-a-Frequency
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programmability
Lexmark Spread Spectrum for optimal electromagnetic
interference (EMI) reduction
SMBus register-programmable options
5V-tolerance SCLK and SDATA lines
3.3V operation
Power management control pins
48-pin SSOP package
Table 1. Frequency Table (MHz)
[1]
FS
(3:0)
0000
0001
0010
0011
0100
0101
0110
0111
(default)
1000
1001
1010
1011
1100
1101
1110
1111
PCI_HT
SEL
X
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
CPU
HT66
PCI
High-Z
(All outputs except XOUT are three-stated)
133.9
166.9
200.9
100.0
133.3
166.7
200.0
105.0
110.0
210.0
240.0
270.0
233.3
266.7
300.0
67.0/33.5
66.8/33.4
67.0/33.5
66.7/33.3
66.7/33.3
66.7/33.3
66.7/33.3
70.0/35.0
73.3/36.7
70.0/35.0
60.0/30.0
67.5/33.8
58.3/29.2
66.7/33.3
75.0/37.5
33.5
33.4
33.5
33.3
33.3
33.3
33.3
35.0
36.7
35.0
30.0
33.8
29.2
33.3
37.5
Block Diagram
XIN
XOUT
14.31818MHz
XTAL
REF(0:2)
Pin Configuration
/4
PLL1
USB
/2
SEL#
24_48MHz
SRESET#
FS(0:3)
PCISTOP#
SPREAD
PD#
SCLK
SDATA
PLL2
CPUT(0:1)
CPUC(0:1)
Control
Logic
/N
PCI33_F
*FS0/REF0
VDD
XIN
XOUT
VSS
PCI33HT66_0/*PCI33HT66SEL0#
PCI33HT66_1/*PCI33HT66SEL1#
PCI33_HT66_2
VDD
VSS
PCI33_HT66_3
PCI33_7
PCI33_0
PCI33_1
VSS
VDD
PCI33_2
PCI33_3
VDD
VSS
PCI33_4
PCI33_5
PCISel/PCI33_F
*PCI33_6/PCISTOP#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
**FS1/REF1
VSS
VDD
*FS2/REF2
SRESET#/PD#
VDDA
VSSA
CPUT0
CPUC0
VSS
VDD
CPUT1
CPUC1
VDD
VSS
VSSF
VDDF
**USB/FS3
VSS
VDD
24_48MHz/**SEL#
VSS
SDATA
SCLK
CY28331
STOP
PCI33_(0:7)
*100K Internal Pull-up
**100K Internal Pull-down
CNTL
PCI33_HT66_(0:3)
Note:
1. HCLK, 66 MHz, and 33 MHz are in phase and synchronous at power-up.
Cypress Semiconductor Corporation
Document #: 38-07491Rev. *C
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3901 North First Street
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San Jose
,
CA 95134
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408-943-2600
Revised December 3, 2003

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