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50- to 200-MHz operating frequency range
Wide range of spread selections (9)
Accepts clock and crystal inputs
Low power dissipation
3.3V = 70 mw. (Fin = 65 MHz)
Frequency spread disable function
Center spread modulation
Low cycle-to-cycle jitter
Eight-pin SOIC package
Applications
鈥?High-resolution VGA controllers
鈥?LCD panels and monitors
鈥?Workstations and servers
Benefits
鈥?Peak EMI reduction by 8 to 16 dB
鈥?Fast time to market
鈥?Cost reduction
Block Diagram
300K
Pin Configuration
Xin/
CLK
1
REFERENCE
DIVIDER
XIN/CLK 1
PD
CP
Loop
Filter
8 XOUT
7 S0
VDD 2
Xout 8
CY25562
MODULATION
CONTROL
FEEDBACK
DIVIDER
vco
VSS 3
SSCLK 4
6 S1
5 SSCC
VDD 2
INPUT
DECODER
LOGIC
VDD
VDD
DIVIDER
&
MUX
4 SSCLK
VSS 3
20 K
20 K
20 K
VSS
20 K
VSS
5
SSCC
6
S1
7
S0
Cypress Semiconductor Corporation
Document #: 38-07392 Rev. *B
鈥?/div>
3901 North First Street
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San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised December 28, 2002
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