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CY25200ZXC Datasheet

  • CY25200ZXC

  • Programmable Spread Spectrum Clock Generator for EMI Reducti...

  • 11頁

  • CYPRESS

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CY25200
Programmable Spread Spectrum
Clock Generator for EMI Reduction
Features
鈥?Wide operating output (SSCLK) frequency range
鈥?3鈥?00 MHz
鈥?Programmable spread spectrum with nominal 31.5-kHz
modulation frequency.
鈥?Center spread: 鹵0.25% to 鹵2.5%
鈥?Down spread: 鈥?.5% to 鈥?.0%
鈥?Input frequency range:
鈥?External crystal: 8鈥?0 MHz fundamental crystals
鈥?External reference: 8鈥?66 MHz Clock
鈥?Integrated phase-locked loop (PLL)
鈥?Programmable crystal load capacitor tuning array
鈥?Low cycle-to-cycle Jitter
鈥?3.3V operation with 2.5V output clock drive option
鈥?Spread spectrum On/Off function
鈥?Power-down or Output Enable function
鈥?Output frequency select option
Benefits
鈥?Suitable for most PC peripherals, networking, and consum-
er applications.
鈥?Provides wide range of spread percentages for maximum
EMI reduction, to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development
and manufacturing costs and time-to-market.
鈥?Eliminates the need for expensive and difficult to use higher
order crystals.
鈥?Internal PLL generates up to 200 MHz outputs, and can
generate custom frequencies from an external crystal or a
driven source.
鈥?Enables fine-tuning of output clock frequency by adjusting
C
Load
of the crystal. Eliminates the need for external C
Load
capacitors.
鈥?Application compatibility in standard and low-power sys-
tems.
鈥?Provides ability to enable or disable spread spectrum with
an external pin.
鈥?Enables low-power state or output clocks to High-Z state.
Logic Block Diagram
7
Divider
Bank 1
Output
Select
Matrix
VCO
P
Divider
Bank 2
SSCLK1
8
SSCLK2
9
SSCLK3
XIN/CLKIN 1
XOUT
16
C
XOUT
OSC.
C
XIN
Q
桅
12
SSCLK4
PLL
14
SSCLK5/REFOUT/CP2
15
SSCLK6/REFOUT/CP3
2
3
AVDD
5
AVSS
13
VSS
11
VDDL
6
VSSL
4
CP0
10
CP1
Pin Configuration
VDD
XIN
VDD
AVDD
CP0
AVSS
VSSL
SSCLK1
SSCLK2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XOUT
SSCLK6
/REFOUT/CP3
SSCLK5
/REFOUT/CP2
VSS
SSCLK4
VDDL
CP1
SSCLK3
Cypress Semiconductor Corporation
Document #: 38-07633 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised April 22, 2004

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