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CY25000 Datasheet

  • CY25000

  • Clocks and Buffers

  • 10頁

  • ETC

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CY25000
Programmable Spread Spectrum
Clock Generator for EMI Reduction
Features
鈥?Wide operating output (SSCLK) frequency range
鈥?3鈥?00 MHz
鈥?Programmable spread spectrum with nominal 30-kHz
modulation frequency
鈥?Center spread: 鹵0.25% to 鹵2.5%
鈥?Down spread: 鈥?.5% to 鈥?.0%
鈥?Input frequency range
鈥?External crystal: 8鈥?0 MHz fundamental crystals
鈥?External reference: 8鈥?66 MHz Clock
鈥?Integrated phase-locked loop (PLL)
鈥?Programmable crystal load capacitor tuning array
鈥?Low cycle-to-cycle Jitter
鈥?3.3V operation
鈥?Spread spectrum On/Off function
鈥?Power-down or Output Enable function
Benefits
鈥?Services most PC peripherals, networking, and consumer
applications.
鈥?Provides wide range of spread percentages for maximum
EMI reduction, to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development
and manufacturing costs and time-to-market.
鈥?Eliminates the need for expensive and difficult to use higher
order crystals.
鈥?Internal PLL to generate up to 200-MHz output. Able to
generate custom frequencies from an external crystal or a
driven source.
鈥?Enables fine-tuning of output clock frequency by adjusting
C
Load
of the crystal. Eliminates the need for external C
Load
capacitors.
鈥?Suitable for most PC, consumer, and networking applica-
tions
鈥?Application compatibility in standard and low-power
systems.
鈥?Provides ability to enable or disable spread spectrum with
an external pin.
鈥?Enables low-power state or output clocks to High-Z state.
Logic Block Diagram
XIN/CLKIN 1
XOUT 8
C
XOUT
OSC.
C
XIN
PLL
with
Modulation Control
Output
Dividers
and
MUX
6 REFCLK
5 SSCLK
Pin Configuration
CY25000
8-pin SOIC
XIN/CLKIN
VDD
PD#/OE
VSS
1
2
3
4
8
7
6
5
XOUT
SSON
REFCLK
SSCLK
Programmable Configuration
PD#/OE 3
SSON 7
2
4
VDD VSS
Cypress Semiconductor Corporation
Document #: 38-07424 Rev. *B
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised September 26, 2003

CY25000相關(guān)型號PDF文件下載

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  • 英文版
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  • 英文版
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  • 英文版
    Spread Aware, Ten/Eleven Output Zero Delay Buffer
    CYPRESS
  • 英文版
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  • 英文版
    Spread Aware, Ten/Eleven Output Zero Delay Buffer
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  • 英文版
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  • 英文版
    Quad PLL Programmable Clock Generator with Spread Spectrum
    CYPRESS [C...
  • 英文版
    Quad PLL Programmable Spread Spectrum Clock Generator with S...
    CYPRESS [C...
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    Spread Aware, Ten/Eleven Output Zero Delay Buffer
    CYPRESS
  • 英文版
    Field- and Factory-Programmable Spread Spectrum Clock Genera...
    CYPRESS
  • 英文版
    Field- and Factory-Programmable Spread Spectrum Clock Genera...
    CYPRESS [C...
  • 英文版
    Programmable Spread Spectrum Clock Generator for EMI Reducti...
    CYPRESS
  • 英文版
    Programmable Spread Spectrum Clock Generator for EMI Reducti...
    CYPRESS [C...
  • 英文版
    Clocks and Buffers
    ETC
  • 英文版
    Frequency-multiplying, Peak-reducing EMI Solution
    CYPRESS
  • 英文版
    Two PLL Programmable Clock Generator with Spread Spectrum
    CYPRESS [C...
  • 英文版
    Three PLL Programmable Clock Generator with Spread Spectrum
    CYPRESS [C...

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