CY2412SC-2 Datasheet

IC型號(hào)：
CY2412SC-2
PDF描述：
MISCELLANEOUS CLOCK GENERATOR|SOP|8PIN|PLASTIC
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141.38KB
PDF頁(yè)數(shù)：
5頁(yè)
芯片廠家：
ETC

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CY2412

MPEG Clock Generator with VCXO

Features

鈥?Integrated phase-locked loop (PLL)

鈥?Low-jitter, high-accuracy outputs

鈥?VCXO with analog adjust

鈥?3.3V operation

Part Number

CY2412

CY2412-2

Outputs

Input Frequency Range

Benefits

Highest-performance PLL tailored for multimedia applications

Meets critical timing requirements in complex system designs

Large 鹵150-ppm range, better linearity

Enables application compatibility

Output Frequencies

13.5-MHz pullable crystal input per Two 27-MHz outputs, one 54-MHz output (3.3V)

Cypress specification

13.5-MHz pullable crystal input per 27 MHz, 13.5 MHz, 54 MHz (3.3V)

Cypress specification

Logic Block Diagram

Pin Configuration

CY2412,-2

8-pin SOIC

XIN

VDD

VCXO

VSS

XOUT

CLKC

CLKB

CLKA

CLKC

13.5 XIN

OSC

XOUT

桅

VCO

OUTPUT

DIVIDERS

CLKB

CLKA

VCXO

PLL

VDD

VSS

Cypress Semiconductor Corporation

Document #: 38-07227 Rev. *A

鈥?/div>

3901 North First Street

鈥?/div>

San Jose

鈥?/div>

CA 95134 鈥?408-943-2600

Revised March 13, 2002

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