CY2310BNZ
3.3V SDRAM Buffer for Mobile PCs
with Four SO-DIMMs
Features
鈥?One input to 10 output buffer/driver
鈥?Supports up to four SDRAM SO-DIMMs
鈥?Two additional outputs for feedback
鈥?SMBus interface for output control
鈥?Low skew outputs
鈥?Up to 100 MHz operation
鈥?Multiple V
DD
and V
SS
pins for noise reduction
鈥?Dedicated OE pin for testing
鈥?Space-saving 28-pin SSOP package
鈥?3.3V operation
Description
The CY2310BNZ is a 3.3V buffer designed to distribute
high-speed clocks in mobile PC applications. The part has ten
outputs, eight of which can be used to drive up to four SDRAM
SO-DIMMs, and the remaining can be used for external
feedback to a PLL. The device operates at 3.3V and outputs
can run up to 100 MHz, thus making it compatible with
Pentium II
錚?/div>
processors. The CY2310BNZ can be used in
conjunction with the CY2281 or similar clock synthesizer for a
full Pentium II motherboard solution.
The CY2310BNZ also includes an SMBus interface that can
enable or disable each output clock. On power-up, all output
clocks are enabled. A separate Output Enable pin facilitates
testing on ATE.
Block Diagram
Pin Configuration
28-pin SSOP
Top View
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SMBus
Decoding
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
V
DD
SDRAM0
SDRAM1
V
SS
V
DD
SDRAM2
SDRAM3
V
SS
BUF_IN
V
DD
SDRAM8
V
SS
V
DDIIC
SDATA
1
2
3
4
28
27
26
25
BUF_IN
SDATA
5
6
7
8
9
10
11
12
13
14
24
23
22
21
20
19
18
17
16
15
SCLOCK
V
DD
SDRAM7
SDRAM6
V
SS
V
DD
SDRAM5
SDRAM4
V
SS
OE
V
DD
SDRAM9
V
SS
V
SSIIC
SCLOCK
CY2310BNZ
OE
Cypress Semiconductor Corporation
Document #: 38-07260 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised January 28, 2003
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