CY22313
Two-PLL Clock Generator with
Direct Rambus鈩?(Lite) Support
Features
Two integrated phase-locked loops (PLLs)
Ultra-accurate PLLs
Direct Rambus鈩?clock support
Two input selects
3.45V core; 3.45V, 2.5V, 1.8V, and 1.675V outputs
24-pin TSSOP package
Benefits
High-performance PLL tailored for multimedia applications
Frequency tolerance within 1 PPM on all frequencies
One pair of differential output drivers, identical specification to
CY2212
Selectable 54.0-/53.946-MHz output and 294.912-/393.216-MHz
Rambus
廬
output
Supports output voltage requirements
Industry-standard packaging saves on board space
Block Diagram
XIN
XOUT
XTAL.
OSC.
Divide by 2
LCLK
CONFIGURATION
LOGIC
FS
S
PLL1
Divider
54MOUT
CLK
PLL2
CLKB
Pin Configuration
VDDRP
VSSRP
Xout
Xin
NC
VSSVPA
VDDVPA
VSS54
54MOUT
FS
VDD54
VDDVP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
S
VDDR
VSSR
CLK
CLKB
VSSR
VDDR
NC
VDDL
VSSL
LCLK
VSSVP
Frequency Select Tables
FS
0
1
S
0
1
54MOUT
54
53.94605395
CLK, CLKB
294.912
393.216
LCLK
9.216
Unit
MHz
MHz
Unit
MHz
MHz
Unit
MHz
PPM
0
鈥?
PPM
0
0
PPM
0
Cypress Semiconductor Corporation
Document #: 38-07434 Rev. *D
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised June 10, 2003
next