CY2081WAF
Three-PLL General Purpose
EPROM Programmable Clock Generator Die
Features
鈥?Three integrated phase-locked loops
鈥?EPROM programmability
鈥?Low-skew, low-jitter, high-accuracy outputs
鈥?Frequency select option
鈥?Smooth slewing on SELCLK
鈥?3.3V or 5V operation
Part Number
CY2081WAF
Outputs
6
Input Frequency Range
Benefits
Provides all necessary system clocks in a single package
Easy customization and fast turnaround time
Meets critical timing requirements in complex system designs
Enables design flexibility and margin testing
Allows downstream PLLs to stay locked on SELCLK output
Enables application compatibility
Output Frequency Range
Specifics
Commercial Temperature
鈥?Power management options (Shutdown, OE, Suspend)
Supports low power applications
10 MHz鈥?5 MHz (external crystal) 76.923 kHz鈥?00 MHz (5V)
76.923 kHz鈥?0 MHz (3.3V)
Logic Block Diagram
XTALIN
OSC.
XTALOUT
S0
S1
S2/SUSPEND
MUX
PLL2
(10 BIT)
/1,2,4,8
/1,2,3,4,5,6
/8,10,12,13
/20,24,26,40
/48,52,96,104
CLKB
CLKC
CLKD
CLKA
PLL1
(8 BIT)
/1,2,4
XBUF
SELCLK
PLL3
(8 BIT)
SHUTDOWN/
OE
CONFIG
EPROM
Overview
The CY2081WAF is a standard CY2081 EPROM Programma-
ble clock in die form. The die is intended to be used as a clock
generator integrated with a crystal in a single package. This
integration can dramatically lower the WIP and Lead Time for
Oscillator manufacturing.
All Performance Specifications are based on a CY2081 in a
16-pin SOIC package per Cypress Specification. When the
CY2081WAF is placed in packages as commonly used in the
oscillator market performance will usually meet or exceed the
specifications given in this datasheet. However, Cypress can-
not guarantee performance in these packages. Each company
that uses Cypress die should test and characterize the perfor-
mance of their final product.
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134
鈥?/div>
408-943-2600
June 5, 2000
next