PRELIMINARY
CY2040WAF
Programmable Clock Die With
Precision 32-kHz Input
2CY2040WAF
Features
鈥?3 Clock outputs
鈥?32.768 kHz
鈥?1 MHz鈥?6 MHz output
鈥?Two Control inputs
Maximize value
Benefits
Precision RTC; CPU clock (powerdown mode), DRAM refresh
User selectable output frequency
Output Enables for Out2 and Out3
Logic Block Diagram
SHADED AREA - CIRCUITS RUNNING ON BATTERY
Vbatt
Out1
Xd1
Xg1
32.768KHz
OSC with
Trim Array
LEVEL SHIFT
MUX
Vpp
CONFIG
EPROM
EPROM Power-
save Circuit
PLL
(13 BIT P)
(7 BIT Q)
7 BIT
POST
DIVIDER
Out2
OE1
PDOE2
Xd2
Xg2
10-30MHz
OSC with
Trim Array
/2
Out3
Vdd
Vss
Config Bits
from
EPROM
LEVEL SHIFTERS + LATCH
Power
On
Reset
Vss
Cypress Semiconductor Corporation
Document #: 38-07234 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised December 7, 2002
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