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CY2039 Datasheet

  • CY2039

  • Clocks and Buffers

  • 8頁

  • ETC

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CY2039
High Accuracy EPROM Programmable
Die for Crystal Oscillators
Features
鈥?EPROM-programmable capacitor tuning array with
Shadow register
鈥?Twice programmable die
鈥?Simple 4-pin programming interface
鈥?On-chip oscillator runs from 10鈥?0 MHz crystal
鈥?EPROM-selectable TTL or CMOS duty cycle levels
Benefits
Enables fine-tuning of crystal clock frequency by adjusting
C
Load
of the crystal
EPROM redundancy allows 2 programming opportunities to
correct errors, and control excess inventory
Enables programming of output frequency after packaging
Lowers cost of oscillator as PPM manufacturing error can be
tweaked in package
Duty cycle centered at 1.4V or V
DD
/2
Provides flexibility to service most TTL or CMOS applications
鈥?Four selectable post-divide options, using reference os-
Provides flexibility in output configurations and testing
cillator output
鈥?Programmable PWR_DWN or OE pin
Enables low-power operation or output enable function
鈥?Programmable asynchronous or synchronous OE and
Provides flexibility for system applications, through selectable
PWR_DWN modes
instantaneous or synchronous change in outputs
鈥?3.3V or 5V operation
鈥?Small Die
鈥?Controlled rise and fall times and output slew rate
Lowers inventory cost as same die services both applications
Enables encapsulation in small-size, surface mount packages
Has lower EMI than oscillators
CY2039 Logic Block Diagram
PWR_DWN
or OE
Die Configuration
Top View
V
DD
V
DD
CONFIGURATION
EPROM
N/C
X
D
N/C
X
G
PWR_DWN
or OE
CLKOUT
N/C
1
2
3
4
5
6
7
11
10
X
G
X
D
CRYSTAL
OSCILLATOR
9
8
V
SS
V
SS
/ 1, 2, 4, 8
CLKOUT
Cypress Semiconductor Corporation
Document #: 38-07355 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised December 7, 2002

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