鈥?/div>
Peripheral functions
鈥?A/D converter
8 bits, 12 channels, successive approximation system
(Conversion time of 20.0碌s at 16MHz)
鈥?Serial interface
Incorporated buffer RAM (Auto transfer for 1 to 32 bytes), 1 channel
Incorporated 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
Incorporated two-wire 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
鈥?Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer,
32kHz timer/counter
鈥?High precision timing pattern generator PPG: maximum of 19 pins, 32 stages programmable
RTG: 5 pins, 2 channels
鈥?PWM/DA gate output
PWM: 12 bits, 2 channels (Repetitive frequency of 62kHz at 16MHz)
DA gate pulse output: 13 bits, 4 channels
鈥?Servo input control
Capstan FG, drum FG/PG, CTL input
鈥?VSYNC separator
鈥?FRC capture unit
Incorporated 26-bit and 8-stage FIFO
鈥?PWM output
14 bits
鈥?VISS/VASS circuit
Pulse duty auto detection circuit
鈥?Remote control reception circuit
8-bit pulse measurement counter with on-chip, 6-stage FIFO
鈥?HSYNC counter
12-bit event counter (Counts SYNC1 input.)
鈥?/div>
Interruption
23 factors, 15 vectors, multi-interruption possible
鈥?/div>
Standby mode
Sleep/stop
鈥?/div>
Package
100-pin plastic QFP
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any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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