鈥?/div>
Peripheral functions
鈥擜/D converter
鈥擲erial interface
24K bytes (CXP84224)
624 bytes
8-bit, 8-channel, successive approximation method
(Conversion time of 32碌s/10MHz)
SIO with 8-bit, 8-stage FIFO incorporated for data use
(Auto transfer for 1 to 8 bytes), 1 channel
8-bit standard SIO, 1 channel
8-bit timer, 8-bit timer/counter, 19-bit time base timer,
16-bit capture timer/counter
Incorporated noise elimination circuit
Incorporated 8-bit, 6-stage FIFO for measurement data
14 bits, 1 channel
13 factors, 14 vectors, multi-interruption possible
Sleep/stop
64-pin plastic SDIP
CXP84200 64-pin ceramic SDIP
64 pin SDIP (Plastic)
鈥擳imer
鈥擱emote control reception circuit
鈥擯WM output circuit
鈥?/div>
Interruption
鈥?/div>
Standby mode
鈥?/div>
Package
鈥?/div>
Piggyback/evaluation chip
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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