鈥?/div>
(24
脳
4 bits is used in combination
with the LCD display memory)
32 general purpose I/O ports
(For 16 segment outputs)
LCD controller/driver (Direct drive possible)
鈥?Optical specification of 24, 20 or 16 segment
outputs
鈥?1/2, 1/3, 1/4 duty selectable through program
鈥?1/3 bias
2 external interruption input pins
8-bit/4-bit variable serial I/O
8-bit timer, 8bit timer/event counter and 18-bit time
base timer are independently controllable
Arithmetic and logical operations possible between
the entire RAM area, I/O area and the accumulator
by means of memory mapped I/O
Reference to the entire ROM area is possible with
the table look-up instruction
2 types of power down models, sleep and stop
64-pin plastic SDIP/QFP available
Piggy back package (CXP5080) available
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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