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CXD2589Q Datasheet

  • CXD2589Q

  • CD Digital Signal Processor

  • 61頁

  • SONY   SONY

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CXD2589Q
CD Digital Signal Processor
Description
The CXD2589Q is a digital signal processor LSI for
CD players and is equipped with built-in digital
filters, zero detection circuit, 1-bit DAC, and analog
low-pass filter on a single chip.
Features
Digital Signal Processor (DSP) Block
鈥?/div>
Playback mode supporting CAV
(Constant Angular Velocity)
鈥?/div>
Frame jitter-free
鈥?/div>
Allows 0.5 to double-speed continuous playback
鈥?/div>
Allows relative rotational velocity readout
鈥?/div>
Supports external spindle control
鈥?/div>
Wide capture range playback mode
鈥?/div>
Spindle rotational velocity following method
鈥?/div>
Supports normal-speed and double-speed playback
鈥?/div>
16K RAM
鈥?/div>
EFM data demodulation
鈥?/div>
Enhanced EFM frame sync protection
鈥?/div>
SEC strategy-based error correction
鈥?/div>
Subcode demodulation and Sub Q data error
detection
鈥?/div>
Digital spindle servo
鈥?/div>
16-bit traverse counter
鈥?/div>
Asymmetry compensation circuit
鈥?/div>
Serial bus-based CPU interface
鈥?/div>
Error correction monitor signals, etc. are output
from a new CPU interface.
鈥?/div>
Servo auto sequencer
鈥?/div>
Digital audio interface output
鈥?/div>
Digital peak meter
Digital Filter, DAC, Analog Low-Pass Filter Block
鈥?/div>
DBB (Digital Bass Boost)
鈥?/div>
Supports double-speed playback
鈥?/div>
Digital de-emphasis
鈥?/div>
Digital attenuation function
鈥?/div>
Zero detection function
鈥?/div>
8Fs oversampling digital filter
鈥?/div>
S/N: 100dB or more (master clock: 384Fs typ.)
Logical value: 109dB
鈥?/div>
THD + N: 0.007% or less
(master clock: 384Fs typ.)
鈥?/div>
Rejection band attenuation: 鈥?0dB or less
Applications
CD players
Structure
Silicon gate CMOS IC
80 pin QFP (Plastic)
Absolute Maximum Ratings
鈥?.3 to +7.0
V
鈥?/div>
Supply voltage V
DD
鈥?/div>
Input voltage
V
I
鈥?.3 to +7.0
V
(Vss 鈥?0.3V to V
DD
+ 0.3V)
鈥?/div>
Output voltage V
O
鈥?.3 to +7.0
V
鈥?/div>
Storage temperature
Tstg
鈥?0 to +125
擄C
鈥?/div>
Supply voltage difference
V
SS
鈥?AV
SS
鈥?.3 to +0.3
V
V
DD
鈥?AV
DD
鈥?.3 to +0.3
V
Note)
AV
DD
includes XV
DD
, and AV
SS
includes XV
SS
.
Recommended Operating Conditions
鈥?/div>
Supply voltage V
DD
3.4 to 5.25
V
鈥?/div>
Operating temperature
Topr
鈥?0 to +75
擄C
Note)
The V
DD
(min.) for the CXD2589Q varies
according to the playback speed selection.
V
DD
(min.) [V]
Playback
speed
CD-DSP block
VCO high VCO normal
speed
speed
3.4
3.4
3.4
3.5
3.5
4.5
3.4
DAC block
2脳
1脳
1脳
鈭?/div>
1
鈭?/div>
1
When the internal operation of the CD-DSP
side is set to double-speed mode and the
crystal oscillation frequency is halved,
normal-speed playback results.
Input/Output Capacitances
鈥?/div>
Input capacitance C
I
12 (max.)
鈥?/div>
Output capacitance C
O
12 (max.)
Note)
Measurement conditions V
DD
= V
I
= 0V
f
M
= 1MHz
pF
pF
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
鈥?鈥?/div>
E96Y02A73

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