CXB1452Q
VGA/SVGA/XGA digital data serial receiver
Features
鈥?1 chip receiver for serial transmission of 18bit color
VGA/SVGA/XGA picture
鈥?On chip differential cable driver
鈥?TTL/CMOS compatible interface
鈥?Support 1 pixel/shiftclock mode & 2 pixel/shiftclock
mode
鈥?+3.3V single power supply
鈥?Low power consumption
鈥?80pin Plastic QFP Package
(Body size: 14mm
脳
14mm)
Block Digagram & Pin out
LPFB
LPFA
V
CC
A
V
EE
A
V
EE
S
80 pin QFP (Plastic)
REFRQN
REFRQP
RED0 (0)
RED0 (1)
RED0 (2)
RED0 (3)
RED0 (4)
RED0 (5)
SDATAN
SDATAP
TESTSB
V
EE
T
V
CC
T
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
TESTDT 61
PANEL1 62
PANEL0 63
CKMODE 64
CNTL3 65
CNTL2 66
CNTL1 67
V
EE
G 68
V
CC
G 69
V
CC
T 70
V
EE
T 71
SFTCLK 72
HSYNC 73
VSYNC 74
V
EE
G 75
V
CC
G 76
CNTL0 77
BLU1 (5) 78
BLU1 (4) 79
V
CC
T 80
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20
Decoder
CDR
PLL
Serial
to
Parallell
Converter
Cable
EQ
40 V
CC
T
39 GRN0 (0)
38 GRN0 (1)
37 GRN0 (2)
36 GRN0 (3)
35 GRN0 (4)
34 GRN0 (5)
33 V
EE
G
32
V
CC
G
V
EE
T
31 V
EE
T
30 V
CC
T
29 BLU0 (0)
28 BLU0 (1)
27
BLU0 (2)
26 V
EE
G
25 V
CC
G
24 BLU0 (3)
23 BLU0 (4)
22 BLU0 (5)
21 V
EE
T
GRN1 (5)
LOS
GRN1 (4)
GRN1 (2)
RED1 (4)
RED1 (3)
RED1 (2)
BLU1 (0)
BLU1 (1)
V
CC
T
V
EE
T
BLU1 (2)
GRN1 (3)
RED1 (5)
GRN1 (0)
Fig. 1. Block Diagram & Pin out
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
鈥?鈥?/div>
GRN1 (1)
RED1 (1)
RED1 (0)
BLU1 (3)
V
CC
T
V
EE
T
E97937-PS
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