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CXA2054S Datasheet

  • CXA2054S

  • US Audio Multiplexing Decoder

  • 38頁(yè)

  • SONY   SONY

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CXA2054S
US Audio Multiplexing Decoder
Description
The CXA2054S is an IC designed as a decoder for
the Zenith TV Multi-channel System and also
corresponds with I
2
C BUS. Functions include stereo
demodulation, SAP (Separate Audio Program)
demodulation, dbx noise reduction and sound
processor. Various kinds of filters are built in while
adjustment, mode control and sound processor
control are all executed through I
2
C BUS.
Features
鈥?/div>
Audio multiplexing decoder, dbx noise reduction
decoder and sound processor (surround, volume
limiter, bass 路 treble, volume) are all included in a
single chip. Almost any sort of signal processing is
possible through this IC.
鈥?/div>
All adjustments are possible through I
2
C BUS to
allow for automatic adjustment.
鈥?/div>
Various built-in filter circuits greatly reduce external
parts.
鈥?There are two channel external inputs for LSOUT
outputs.
鈥?Automatic volume control between input sources is
possible through volume limiter.
Standard I/O Level
鈥?/div>
Input level
COMPIN (Pin 19)
AUX1-L/R (Pins 40 and 39)
AUX2-L/R (Pins 42 and 41)
SURRIN (Pin 4)
Pin Configuration
(Top View)
48
47
46
45
44
43
42
41
40
39
38
37
36
48 pin SDIP (Plastic)
Absolute Maximum Ratings
(Ta=25 擄C)
鈥?/div>
Supply voltage
V
CC
11
鈥?0 to +75
鈥?5 to +150
2.2
V
擄C
擄C
W
鈥?/div>
Operating temperature Topr
鈥?/div>
Storage temperature
Tstg
鈥?/div>
Allowable power dissipation
P
D
Range of Operating Supply Voltage
9鹵0.5
V
Applications
TV, VCR and other decoding systems for US audio
multiplexing TV broadcasting
Structure
Bipolar silicon monolithic IC
鈥?/div>
Output level
TVOUT-L/R (Pins 44 and 43)
LSOUT-L/R (Pins 7 and 6)
SURROUT (Pin 5)
245 mVrms
490 mVrms
490 mVrms
490 mVrms
490 mVrms
490 mVrms
490 mVrms
鈭桝
license of the dbx-TV noise reduction system is
required for the use this device.
35
34
33
32
31
30
29
28
27
26
25
AUX2-L
SURRTC
BASSL1
VCATC
SAPIN
VETC
TVOUT-L
TVOUT-R
NOISETC
SURROUT
VCAWGT
LSOUT-R
MAINOUT
LSOUT-L
MAININ
PCINT1
COMPIN
BASSL2
SURRIN
PCINT2
SCL
SAPTC
23
DGND
TRER
TREL
PLINT
IREF
VGR
SDA
GND
SAD
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
NC
16
17
18
19
20
21
22
24
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
鈥?鈥?/div>
V
CC
SUBOUT
VLTC
SAPOUT
AUX2-R
BASSR2
VEWGT
AUX1-L
VCAIN
VLDC
BASSR1
VEOUT
VE
AUX1-R
STIN
E96Y15B86-TE

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