CXA2025AS
Y/C/RGB/Sync/Deflection for Color TV
Description
The CXA2025AS is a bipolar IC which integrates
the luminance signal processing, chroma signal
processing, RGB signal processing, and sync and
deflection signal processing functions for NTSC
system color TVs onto a single chip.
The following functions have been added to the
same function IC, CXA2025S.
1) Vertical sync pull-in speed switching function
2) YUV SW Y signal switching function
Features
鈥?/div>
I
2
C bus compatible
鈥?/div>
Sync signal processing uses a countdown system
with non-adjusting H/V oscillator frequencies
鈥?/div>
Built-in deflection compensation circuit capable of
supporting various wide modes
鈥?/div>
Non-adjusting Y/C block filter
鈥?/div>
Built-in AKB
鈥?/div>
Video signal I/Os: Y/C separation input, Y/color
difference input, analog RGB input and RGB
output
鈥?/div>
YUV SW Y signal switching function allows picture
quality adjustment for the Y signal in the same
manner as for the normal Y signal even when
Y/color difference input is selected
Applications
Color TVs (4:3, 16:9)
Structure
Bipolar silicon monolithic IC
SAWOSC
VAGCSH
EWDRIVE
48 pin SDIP (Plastic)
Absolute Maximum Ratings
(Ta = 25擄C, SGND, JGND = 0V)
鈥?/div>
Supply voltage
SV
CC
, JV
CC
鈥?.3 to +12 V
鈥?/div>
Operating temperature
Topr
鈥?0 to +75 擄C
鈥?/div>
Storage temperature
Tstg
鈥?5 to +150 擄C
鈥?/div>
Allowable power dissipation
P
D
1.5
W
鈥?/div>
Voltages at each pin 鈥?.3 to SV
CC
, JV
CC
+ 0.3 V
Operating Conditions
Supply voltage
SV
CC
JV
CC
9.0 鹵 0.5
9.0 鹵 0.5
V
V
VDRIVE+ /VPROT
VDRIVE鈥?/VPROT
AFCFIL
HDRIVE
VTIM (SCP)
Pin Configuration
VSFIL
CERA
JGND
HSIN
VSIN
L2FIL
IREF
BGP
NC
NC
VM
ABLIN/VCOMP
26
23
AFCPIN/HOFF
ABLFIL
JV
CC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
24
BLHOLD
SGND
EYIN
ROUT
XTAL
BSH
SCL
GIN
YIN
ERYIN
APCFIL
EBYIN
YUV SW
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
鈥?鈥?/div>
GOUT
E96413-ST
BOUT
YM
SV
CC
GSH
SDA
CIN
BIN
YS
RSH
RIN
IKIN
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