鈥?/div>
Allowable power dissipation
P
D
SOP
SSOP
350 (75擄C) mW
220 (75擄C) mW
Recommended Supply Voltage Range
Supply voltage
V
CC
6 to 12
Block Diagram and Pin Configuration
INAO1
VRIN1
VCT1
INN1
OUT1
INP1
GND
VCT
NC
V
CC
V
20
19
18
17
16
15
14
13
12
11
100k
VOLUME
8dB STEP
VOLUME
1dB STEP
100k
VCTBUFF
LATCH
LATCH CONTROL
ZCDET
SHIFT REGISTER
50K
VOLUME
8dB STEP
VOLUME
1dB STEP
1
2
3
4
5
6
7
8
VCTBUFF
9
VCTBUFF
10
50K
INAO2
VRIN2
DATA
INN2
VCT2
INP2
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
鈥?鈥?/div>
OUT2
CLK
INIT
CE
E97102B8Y
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