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CXA1310AQ Datasheet

  • CXA1310AQ

  • Single Chip Processing for CCD Monochrome Camera

  • 13頁

  • SONY   SONY

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CXA1310AQ
Single Chip Processing for CCD Monochrome Camera
Description
The CXA1310AQ is designed to perform the basic
signal processing in CCD monochrome cameras with
a single chip. This bipolar lC is most suitable for
compact usage and low power consumption.
Features
鈥?/div>
Processing from CCD output to 75鈩?video output
with a single chip
鈥?/div>
Wide variable AGC (4 to 32dB Typ.)
鈥?/div>
Built-in operational amplifier for AGC loop
鈥?/div>
75鈩?line capacitance minimized using sag compen-
sation function
鈥?/div>
Variable white clip level realize wide dynamic range
(140 IRE)
Application
CCD monochrome camera
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
(Ta = 25擄C)
鈥?/div>
Supply voltage
鈥?/div>
Storage temperature
鈥?/div>
Operating temperature
鈥?/div>
Allowable power dissipation
Operating Conditions
Supply voltage
7
V
V
CC
Tstg 鈥?5 to +150 擄C
Topr 鈥?0 to +75 擄C
P
D
500
mW
32 pin QFP (Plastic)
V
CC
4.75 to 5.25 V
Block Diagram and Pin Configuration
AGC CONT
AGC MAX
AGC OUT
OP IN+
OP OUT
HSD2
HSD1
緯
CLP
CLP2
SHP
緯
IN
25
24
21
20
14 16
12
11
10
17
18 OP IN鈥?/div>
24 23 22 21 20 19 18 17
CLP2 25
GND3 26
IRIS 27
16
AGC CONT
PG 23
CLP2
S/H
S/H
S/H
SHD2
SHP
OP IN鈥?/div>
PG
OP OUT
15 V
CC
1
14
13
AGC MAX
DET OUT
12 AGC OUT
11
緯
IN
10
緯
CLP
9
LINEAR
8
19 OP IN+
AGC
DATA 22
GND3 26
IRIS 27
BLK
CLP1
CLP2
S/H
S/H
CLP1
BLK
13 DET OUT
IRIS CLP 28
BLK 29
CLP1 30
31 V
CC
2
V
CC
2 31
VIDEO 32
V
CC
1 15
緯
1
GND1 3
緯
2
CLP1
WC
SETUP
BLK
DATA
SHD1
SYNC
DRIVE
32 VIDEO
1
2
SAG
GND2
1
2
3
4
5
6
7
GND1
28
9
8
7
6
5
4
30
29
IRIS CLP
緯
OUT
SET CONT
WC CONT
LINEAR
SYNC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
DRIVER IN
鈥?鈥?/div>
CLP1
BLK
SET CONT
DRIVER IN
WC CONT
SYNC
E89Z21A78-PS
緯
OUT
GND2
SAG

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