CX77129
System Smart鈩?PA Module for CDMA / AMPS (824鈥?49 MHz)
The CX77129 Power Amplifier Module is a dual-mode Code Division Multiple
Access (CDMA) / Advanced Mobile Phone Service (AMPS) module designed for
mobile units operating in the 824鈥?49 MHz cellular bandwidth. This device
meets stringent IS95 CDMA linearity requirements to and beyond 28 dBm output
power and can be driven to power output levels beyond 31 dBm for high
efficiency FM mode operation. The CX77129 System Smart
TM
design presents a
unique feature that enables exceptionally low average battery current
consumption with two control pins that accept digital signals provided by the
system鈥檚 baseband ASIC. This digital control logic defines an RF power range of
operation for the PA. The decoding logic within the PA uses this information to
optimize efficiency within this power range while meeting the specification for
Adjacent Channel Power Ratio (ACPR).
The two control pins (referred to as V
CONT1
and V
CONT2
) allow the PA to be
switched into one of four states.
鈥?State/Power-range 3鈥攈igh power mode, linear up to P
OUT
= 28 dBm, total
PA current is typically 560 mA (V
CONT1
= High, V
CONT2
= High)
鈥?State/Power-range 2鈥攎edium power mode, linear up to P
OUT
= 13 dBm,
total PA current is typically 130 mA (V
CONT1
= Low, V
CONT2
= High)
鈥?State/Power-range 1鈥攍ow power mode, linear up to P
OUT
= 鈥? dBm, total
PA current is typically 46 mA (V
CONT1
= Low, V
CONT2
= Low)
鈥?State/Power-range 0鈥攑ower-down mode, leakage current less than 5
碌A(chǔ)
(V
CONT1
= Low, V
CONT2
= Low, V
REF
= 0.0 V)
The current in States 1 and 2 is much lower than that achieved in a conventional
Power Amplifier.
Distinguishing Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
System Smart
TM
design
Three switchable power states
Dual digital input for setting
power states
Power down control
Higher efficiency over large
dynamic range
8-pin LCC package
(6 x 6 x 1.5 mm)
Applications
鈥?/div>
鈥?/div>
鈥?/div>
Digital cellular (CDMA)
Analog cellular (AMPS)
Wireless Local Loop (WLL)
Functional Block Diagram
V
CONT1
(4)
V
CONT2
(8)
V
REF
(3)
V
CC
(1, 5)
Bias Circuits and Decoding Logic
RFIN (2)
Input
Match
DA
Inter
Stage
Match
PA
Output
Match
(6) RFOUT
MMIC
MODULE
GND
(7)
GND2
(9)
Data Sheet
漏 2001, 2002 Skyworks Solutions, Inc., All Rights Reserved.
101384B
September 5, 2002
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