CX74005
VGA + I/Q Demodulator Rx ASIC for Portable Phone Applications
The CX74005 Application-Specific Integrated Circuit (ASIC) is a Variable Gain
Amplifier (VGA) and I/Q demodulator, intended for use in Code Division Multiple
Access (CDMA) portable phones in both cellular and Personal Communications
System (PCS) bands. As a trimode IC, it can be used in CDMA mode or Advanced
Mobile Phone System (AMPS) mode.
The device incorporates a VGA and the In-Phase and Quadrature (I/Q)
demodulator stages. The intermediate frequencies (IF) are combined through
separate buffers at the input of the VGA depending on the selected mode. The
VGA has a gain control range greater than 90 dB.
There are two Very High Frequency (VHF) oscillators that operate with external
tank circuits. They provide signals to the Local Oscillator (LO) for the I/Q
demodulator in the cellular and PCS bands.
The noise figure, gain, and third order Input Intercept Point (IIP3) of the CX74005
are optimized to meet the system requirements for AMPS and CDMA modes as per
TIA/EIA-98-B, ANSI J-STD-018 (PCS), CDMA2000. Employing silicon bipolar
technology, the ASIC is designed for high performance, a high level of integration
and low cost.
The device package and pinout are shown in Figure 1. A block diagram of the
CX74005 is shown in Figure 2.
GND
GND
Features
鈥?/div>
Supports CDMA/AMPS/PCS1900 modes
鈥?/div>
Three battery cell operation
(2.7 V < VCC < 3.3 V).
鈥?/div>
IF inputs and I/Q outputs
鈥?/div>
On-chip 100 to 640 MHz oscillators
鈥?/div>
Low power operation: <25 mA
鈥?/div>
32-pin Land Grid Array (LGA) 5 x 5 mm package
Applications
鈥?/div>
Tri-mode handsets
鈥?/div>
CDMA and AMPS modes in the cellular band:
鈭?/div>
AMPS
鈭?/div>
CDMA-US
鈭?/div>
CDMA-Japan
鈥?/div>
CDMA mode in the PCS band:
鈭?/div>
PCS-US
鈭?/div>
PCS-Korea
SIF
Q+
28
31
30
29
27
Q-
I+
I-
32
26
25
24
23
22
21
20
19
18
17
GND
FM/CDMA
CELL/PCS
VCO_VCC
VCO_GND
CELL_TANK1-
CELL_TANK1+
NC
PCS_TANK-
1
2
3
4
5
6
7
8
9
GND
VGA_AMPS
NC
VGA_PCS_IN+
VGA_PCS_IN-
VGA_CDMA_IN+
VGA_CDMA_IN-
IF_VCC
VGA_GC
10
12
13
14
15
PCS_TANK+
DIV2/DIV4
IF_GND
SLEEP
PLL+
GND
PLL-
16
11
CNXT044
Figure 1. Rx ASIC Pinout 鈥?32-Pin LGA Package
(Top View)
Data Sheet
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
Doc. No. 101252A
March 13, 2001
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