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CD74HC283 Datasheet

  • CD74HC283

  • High Speed CMOS Logic 4-Bit Binary Full Adder with Fast Carr...

  • 11頁

  • TI

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CD74HC283,
CD74HCT283
Data sheet acquired from Harris Semiconductor
SCHS176
November 1997
High Speed CMOS Logic
4-Bit Binary Full Adder with Fast Carry
Description
The Harris CD74HC283 and CD74HCT283 binary full
adders that add two 4-bit binary numbers and generate a
carry-out bit if the sum exceeds 15.
Because of the symmetry of the add function, this device
can be used with either all active-high operands (positive
logic) or with all active-low operands (negative logic). When
using positive logic the carry-in input must be tied low if there
is no carry-in.
Features
鈥?Adds Two Binary Numbers
鈥?Full Internal Lookahead
鈥?Fast Ripple Carry for Economical Expansion
鈥?Operates with Both Positive and Negative Logic
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
[ /Title
(CD74
HC283
,
CD74
HCT28
3)
/Sub-
ject
(High
Speed
CMOS
Logic
4-Bit
Binary
Full
Adder
Ordering Information
PART NUMBER
CD74HC283E
CD74HCT283E
CD74HC283M
CD74HCT283M
NOTES:
1. When ordering, use the entire part number. Add the suf鏗亁 96 to
obtain the variant in the tape and reel.
2. Wafer and die is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
TEMP. RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld PDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
PKG.
NO.
E16.3
E16.3
M16.15
M16.15
Pinout
CD74HC283, CD74HCT283
(PDIP, SOIC)
TOP VIEW
Functional Diagram
A0
B0
S1 1
B1 2
A1 3
S0 4
A0 5
B0 6
C
IN
7
GND 8
16 V
CC
15 B2
14 A2
13 S2
12 A3
11 B3
10 S3
9 C
OUT
B3
C
IN
A2
B2
A3
A1
B1
5
6
3
2
14
15
12
11
7
9
C
OUT
GND = 8
V
CC
= 16
10
S3
13
1
4
S0
S1
S2
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1997
File Number
1848.1
1

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