Data sheet acquired from Harris Semiconductor
SCHS159
CD74HC174,
CD74HCT174
High Speed CMOS Logic
Hex D-Type Flip-Flop with Reset
Description
The Harris CD74HC174 and CD74HCT174 are edge
triggered flip-flops which utilize silicon gate CMOS circuitry to
implement D-type flip-flops. They possess low power and
speeds comparable to low power Schottky TTL circuits. The
devices contain six master-slave 鏗俰p-鏗俹ps with a common
clock and common reset. Data on the D input having the
speci鏗乪d setup and hold times is transferred to the Q output
on the low to high transition of the CLOCK input. The MR
input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL
equivalent loads. The CD74HCT174 is functional as well as,
pin compatible to the 74LS174.
August 1997
Features
鈥?Buffered Positive Edge Triggered Clock
鈥?Asynchronous Common Reset
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
[ /Title
(CD74
HC174
,
CD74
HCT17
4)
/Sub-
ject
(High
Speed
CMOS
Logic
Hex D-
Type
Flip-
Flop
Ordering Information
PART NUMBER
CD74HC174E
CD74HCT174E
CD74HC174M
CD74HCT174M
CD74HCT174W
NOTES:
1. When ordering, use the entire part number. Add the suf鏗亁 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld PDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
Wafer
PKG.
NO.
E16.3
E16.3
M16.15
M16.15
Pinout
CD74HC174, CD74HCT174
(PDIP, SOIC)
TOP VIEW
MR 1
Q
0
2
D
0
3
D
1
4
Q
1
5
D
2
6
Q
2
7
GND 8
16 V
CC
15 Q
5
14 D
5
13 D
4
12 Q
4
11 D
3
10 Q
3
9 CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
Harris Corporation 1997
File Number
1608.1
1
1
2
3
4
5
6
7
