廬
CA5420A
Data Sheet
December 21, 2005
FN1925.5
0.5MHz, Low Supply Voltage, Low Input
Current BiMOS Operational Amplifiers
The CA5420A is an integrated circuit operational amplifier that
combines PMOS transistors and bipolar transistors on a single
monolithic chip. It is designed and guaranteed to operate in
microprocessor logic systems that use V+ = 5V, V- = GND,
since it can operate down to
鹵1V
supplies. It will also be
suitable for 3.3V logic systems.
The CA5420A BiMOS operational amplifier features gate-
protected PMOS transistors in the input circuit to provide very
high input impedance, very low input currents (less than 1pA).
The internal bootstrapping network features a unique
guardbanding technique for reducing the doubling of leakage
current for every 10擄C increase in temperature. The CA5420A
operates at total supply voltages from 2V to 20V either single or
dual supply. This operational amplifier is internally phase
compensated to achieve stable operation in the unity gain
follower configuration. Additionally, it has access terminals for a
supplementary external capacitor if additional frequency roll-off
is desired. Terminals are also provided for use in applications
requiring input offset voltage nulling. The use of PMOS in the
input stage results in common-mode input voltage capability
down to 0.45V below the negative supply terminal, an important
attribute for single supply application. The output stage uses a
feedback OTA type amplifier that can swing essentially from
rail-to-rail. The output driving current of 1.0mA (Min) is provided
by using nonlinear current mirrors.
This device has guaranteed specifications for 5V operation
over the full military temperature range of -55擄C to 125擄C.
The CA5420A has the same 8 lead pinout used for the
industry standard 741.
Features
鈥?CA5420A at 5V Supply Voltage with Full Military
Temperature Range Guaranteed Specifications
鈥?CA5420A Guaranteed to Operate from
鹵1V
to
鹵10V
Supplies
鈥?2V Supply at 300碌A(chǔ) Supply Current
鈥?1pA (Typ) Input Current (Essentially Constant to 85擄C)
鈥?Rail-to-Rail Output Swing (Drive
鹵2mA
Into 1k鈩?Load)
鈥?Pin Compatible with 741 Op Amp
鈥?Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
鈥?pH Probe Amplifiers
鈥?Picoammeters
鈥?Electrometer (High Z) Instruments
鈥?Portable Equipment
鈥?Inaccessible Field Equipment
鈥?Battery Dependent Equipment (Medical and Military)
鈥?5V Logic Systems
鈥?Microprocessor Interface
Ordering Information
PART
TEMP.
PART NUMBER MARKING RANGE (擄C) PACKAGE
CA5420AM
CA5420AMZ*
(Note)
5420A
5420AMZ
-55 to 125
-55 to 125
8 Ld SOIC
8 Ld SOIC
(Pb-free)
PKG.
DWG. #
M8.15
M8.15
Functional Diagram
X1
*Add 鈥?6鈥?suffix for Tape and Reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
MOS
BIPOLAR
-
MOS
BIPOLAR
+
Pinout
CA5420A (SOIC)
TOP VIEW
OFFSET 1
NULL
INV.
2
INPUT
NON-INV. 3
INPUT
V- 4
8 STROBE
X1
BUFFER AMPS;
BOOTSTRAPPED
INPUT PROTECTION
NETWORK
HIGH GAIN
(50K)
OTA BUFFER
(X2)
-
+
7 V+
6 OUTPUT
5 OFFSET
NULL
NOTE: Pin is connected to Case.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1998, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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