CA3083
Data Sheet
September 1998
File Number 481.4
General Purpose High Current NPN
Transistor Array
The CA3083 is a versatile array of 鏗乿e high current (to
100mA) NPN transistors on a common monolithic substrate.
In addition, two of these transistors (Q
1
and Q
2
) are
matched at low current (i.e., 1mA) for applications in which
offset parameters are of special importance.
Independent connections for each transistor plus a separate
terminal for the substrate permit maximum 鏗俥xibility in circuit
design
.
Features
鈥?High I
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA (Max)
鈥?Low V
CE sat
(at 50mA) . . . . . . . . . . . . . . . . . . 0.7V (Max)
鈥?Matched Pair (Q
1
and Q
2
)
- V
IO
(V
BE
Match) . . . . . . . . . . . . . . . . . . . .
鹵5mV
(Max)
- I
IO
(at 1mA). . . . . . . . . . . . . . . . . . . . . . . . 2.5碌A(chǔ) (Max)
鈥?5 Independent Transistors Plus Separate Substrate
Connection
Applications
鈥?Signal Processing and Switching Systems Operating from
DC to VHF
鈥?Lamp and Relay Driver
鈥?Differential Ampli鏗乪r
鈥?Temperature Compensated Ampli鏗乪r
鈥?Thyristor Firing
鈥?See Application Note AN5296 鈥淎pplications of the
CA3018 Circuit Transistor Array鈥?for Suggested
Applications
Ordering Information
PART NUMBER
(BRAND)
CA3083
CA3083M
(3083)
CA3083M96
(3083)
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC Tape
and Reel
PKG.
NO.
E16.3
M16.15
M16.15
Pinout
CA3083
(PDIP, SOIC)
TOP VIEW
1
2
3
4
SUBSTRATE
5
6
Q
3
7
8
Q
4
10
9
Q
5
16
15
14
13
12
11
Q
1
Q
2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright
漏
Intersil Corporation 1999