C8051F350
50 MIPS, 8 kB Flash, 24-Bit ADC, 32-Pin Mixed-Signal MCU
Analog Peripherals
24-Bit ADC
High-Speed 8051 碌C Core
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0.0015% nonlinearity
Programmable throughput up to 1 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 128, 64, 32, 16, 8, 4, 2, 1
Data-dependent windowed interrupt generator
Built-in temperature sensor (鹵3 擄C)
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 50 MIPS throughput with 50 MHz clock
Expanded interrupt handler
768 bytes data RAM
8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
17 port I/O; all 5 V tolerant
Hardware SMBus鈩?(I2C鈩?compatible), SPI鈩? and UART serial ports
available concurrently
16-bit programmable counter array with three capture/compare modules,
WDT
4 general-purpose 16-bit counter/timers
Realtime clock mode using PCA or timer and external clock source
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
External oscillator: Crystal, RC, C, or clock (1 or 2 pin modes)
2x clock multiplier to achieve 50 MHz internal clock
Can switch between clock sources on-the-fly
Typical operating current: 17 mA at 50 MHz
16 碌A(chǔ) at 32 kHz
Typical stop mode current: <0.1 碌A(chǔ)
Memory
Two 8-Bit Current DACs
Comparator
16 Programmable hysteresis values and response time
Configurable to generate interrupts or reset
Low current (0.4 碌A(chǔ))
Digital Peripherals
Internal Voltage Reference
V
DD
Monitor/Brown-out Detector
On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints
Inspect/modify memory, registers, and stack
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Clock Sources
Supply Voltage: 2.7 to 3.6 V
32-Pin LQFP
Temperature Range: 鈥?0 to +85 擄C
VDD
GND
AV+
AGND
RST/C2CK
Digital Power
Analog
Power
C2D
Debug HW
Reset
Brown-
Out
8
0
5
1
8 kB
FLASH
256 Byte
SRAM
512 Byte
XRAM
Port 0
Latch
UART
Timer 0,
1, 2, 3
3-Chnl
PCA/
WDT
SMBus
SPI Bus
X
B
A
R
P
0
D
r
v
P0.0
P0.1
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7
+
-
POR
External
Oscillator
Circuit
24.5 MHz 2%
Internal
Oscillator
XTAL1
XTAL2
System
Clock
Clock
Multiplier
C
o
SFR Bus
r
e
CP0
CP0A
CP0+
CP0-
VREF+
VREF-
VREF
Port 1
Latch
P
1
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
A
M
U
X
Buffer
+
+
Offset
DAC
PGA
24-bit
ADC0
8-bit
IDAC0
8-bit
IDAC1
D
r
v
P1.0
P1.1
P1.2
P1.3
P1.4/CP0A
P1.5/CP0
P1.6/IDAC0
P1.7/IDAC1
Temp
Sensor
C2D
Port 2
Latch
P2.0/C2D
Precision Mixed Signal
Copyright 漏 2004 by Silicon Laboratories
6.15.2004
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