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C8051F336 Datasheet

  • C8051F336

  • Mixed Signal ISP Flash MCU Family

  • 3348.28KB

  • 234頁

  • SILABS

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C8051F336/7/8/9
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
10-Bit ADC (鈥楩336/8 only)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Up to 200 ksps
Up to 20 external single-ended or differential inputs
VREF from on-chip VREF, external pin or V
DD
Internal or external start of conversion source
Built-in temperature sensor
Memory
-
768 bytes internal data RAM (256 + 512)
-
16 kB Flash; In-system programmable in 512-byte
Sectors (512 bytes are reserved)
Digital Peripherals
-
21 or 17 Port I/O; All 5 V tolerant with high sink
-
-
-
-
current
Pin-compatible with C8051F330 family of MCUs
Hardware enhanced UART, SMBus鈩?(I
2
C compati-
ble), and enhanced SPI鈩?serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with three
capture/compare modules and enhanced PWM
functionality
Real time clock mode using timer and crystal
-
-
10-Bit Current Output DAC (鈥楩336/8 only)
Comparator
鈥?/div>
鈥?/div>
Programmable hysteresis and response time
Configurable as interrupt or reset source
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-
-
-
intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost,
complete
development kit
-
Supply Voltage 2.7 to 3.6 V
-
Built-in voltage supply monitor
High-Speed 8051 碌C Core
-
Pipelined instruction architecture; executes 70% of
-
-
Temperature Range: 鈥?0 to +85 擄C
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
-
Clock Sources
-
24.5 MHz 鹵2% Oscillator
鈥?/div>
鈥?/div>
Supports crystal-less UART operation
Low-power suspend mode with fast wake time
-
-
-
80/20/40/10 kHz low-frequency, low-power
oscillator
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly; useful
in power saving modes
20 or 24-Pin QFN (4 x 4 mm)
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
CROSSBAR
Port 0
Port 1
P2.0鈥?/div>
P2.3*
P2.4*
*P2.1鈥?.4 QFN24 Only
10-bit
200 ksps
ADC
10-bit
Current
DAC
+
TEMP
SENSOR
鈥楩336/8 Only
鈥?/div>
VOLTAGE
COMPARATOR
24.5 MHz PRECISION
INTERNAL OSCILLATOR
LOW FREQUENCY INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
16 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR
WDT
Rev. 0.2 8/07
Copyright 漏 2007 by Silicon Laboratories
C8051F336/7/8/9
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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