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C8051F060_07 Datasheet

  • C8051F060_07

  • Mixed Signal ISP Flash MCU Family

  • 2186.92KB

  • 328頁

  • SILABS

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C8051F060/1/2/3/4/5/6/7
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
Two 16-Bit SAR ADCs
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16-bit resolution
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鹵0.75 LSB INL, guaranteed no missing codes
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Programmable throughput up to 1 Msps
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Operate as two single-ended or one differential con-
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-
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verter
Direct memory access; data stored in RAM without
software overhead
Data-dependent windowed interrupt generator
Programmable throughput up to 200 ksps
8 external inputs, single-ended or differential
Built-in temperature sensor
Can synchronize outputs to timers for jitter-free wave-
form generation
Programmable hysteresis/response time
High Speed 8051
碌C
Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
-
4352 Bytes internal data RAM (4 k + 256)
-
64 kB (C8051F060/1/2/3/4/5), 32 kB (C8051F066/7)
-
Flash; In-system programmable in 512-byte sectors
External 64 kB data memory interface with multi-
plexed and non-multiplexed modes (C8051F060/2/
4/6)
instruction set in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Flexible Interrupt sources
10-bit SAR ADC (C8051F060/1/2/3)
-
Two 12-bit DACs (C8051F060/1/2/3)
Three Analog Comparators
Digital Peripherals
-
59 general purpose I/O pins (C8051F060/2/4/6)
-
24 general purpose I/O pins (C8051F061/3/5/7)
-
Bosch Controller Area Network (CAN 2.0B -
-
-
C8051F060/1/2/3)
Hardware SMBus鈩?(I2C鈩?Compatible), SPI鈩? and
two UART serial ports available concurrently
Programmable 16-bit counter/timer array with
6 capture/compare modules
5 general purpose 16-bit counter/timers
Dedicated watchdog timer; bi-directional reset pin
-
Voltage Reference
-
Precision VDD Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
-
On-chip debug circuitry facilitates full-speed, non-
-
-
-
-
intrusive in-circuit/in-system debugging
Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
IEEE1149.1 compliant boundary scan
Complete development kit
-
-
Clock Sources
-
Internal calibrated precision oscillator: 24.5 MHz
-
External oscillator: Crystal, RC, C, or clock
Supply Voltage .......................... 2.7 to 3.6 V
-
Multiple power saving sleep and shutdown modes
100-Pin and 64-Pin TQFP Packages Available
Temperature Range: -40 to +85 擄C
ANALOGPERIPHERALS
16-bit
1 Msps
ADC
16-bit
1 Msps
ADC
VREF
DIGITAL I/O
C8051F060/1/2/3
CROSSBAR
CAN 2.0B
Port 0
Port 1
Port 2
Port 3
External Memory
Interface
DMA
Interface
+
+ +
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
VOLTAGE
COMPARATOR
S
12-Bit
DAC
12-Bit
DAC
-
-
-
Port 4
Port 5
Port 6
Port 7
10-bit
200ksps
ADC
AMUX
TEMP
SENSOR
C8051F060/1/2/3Only
100 pin Only
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
22
INTERRUPTS
64/32 kB
ISP FLASH
DEBUG
CIRCUITRY
4352 B
JTAG
SRAM
CLOCK
SANITY
CIRCUIT
CONTROL
Preliminary Rev. 1.2 7/04
Copyright 漏 2004 by Silicon Laboratories
C8051F060/1/2/3/4/5/6/7
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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