鈥?/div>
Control Unit
16-bit two levels instruction decoder
Three levels instruction queue
55 instructions and 14 address modes
Supervisor and User mode
Independent stack for both modes
Users registers
Eight 32-bit data & address registers
16-bit status register
Data format
Integer 8, 16 or 32-bit
BCD packet
Bit
Memory interface
Independent data and address buses
Asynchronous bus control
4 GB-address space
31-bit address bus (optional 32-bit)
8-address spaces (used 5)
16-bit data bus
Interrupt Controller
Seven Priority Levels
Unlimited interrupt sources
Vectored or auto-vectored interrupt
modes
Arithmetic-Logic Unit
8, 16, 32-bit arithmetic and logic
operations
Boolean manipulations
16 x 16-bit multiplication (sign or
unsigned)
32 / 16-bit division (sign or unsigned)
M6800 peripherals family synchronous
interface
Two or Three wire bus arbitration interface
Operation execution is the same for data or
address registers
No different for operation on data or
address registers
Page 1
Symbol
C68000
addr
clk
addrz
datai
fc
datao
dataz
e
vma
vpa_n
berr_n
ctrlz
as_n
rw
uds_n
lds_n
reseti_n
reseto_n
halti_n
halto_n
dtack_n
br_n
bg_n
bgack_n
ipl_n
CAST, Inc.
March 2004