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C34080BD Datasheet

  • C34080BD

  • HIGH PERFORMANCE JFET INPUT OPERATIONAL AMPLIFIERS

  • 16頁

  • MOTOROLA   MOTOROLA

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Order this document by MC34080/D
t
High Slew Rate, Wide
Bandwidth, JFET Input
Operational Amplifiers
These devices are a new generation of high speed JFET input monolithic
operational amplifiers. Innovative design concepts along with JFET
technology provide wide gain bandwidth product and high slew rate.
Well鈥搈atched JFET input devices and advanced trim techniques ensure low
input offset errors and bias currents. The all NPN output stage features large
output voltage swing, no deadband crossover distortion, high capacitive
drive capability, excellent phase and gain margins, low open loop output
impedance, and symmetrical source/sink AC frequency response.
This series of devices is available in fully compensated or
decompensated (AVCL
鈮?)
and is specified over a commercial temperature
range. They are pin compatible with existing Industry standard operational
amplifiers, and allow the designer to easily upgrade the performance of
existing designs.
鈥?/div>
Wide Gain Bandwidth: 8.0 MHz for Fully Compensated Devices
Wide Gain Bandwidth:
16 MHz for Decompensated Devices
鈥?/div>
High Slew Rate: 25 V/碌s for Fully Compensated Devices
High Slew Rate:
50 V/碌s for Decompensated Devices
鈥?/div>
High Input Impedance: 1012
鈩?/div>
MC34080
thru
MC34085
HIGH PERFORMANCE
JFET INPUT
OPERATIONAL AMPLIFIERS
8
1
8
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO鈥?)
PIN CONNECTIONS
Offset Null
Inv. Input
Noninv. Input
VEE
1
2
3
4
鈥?/div>
+
8
7
6
5
NC
VCC
Output
Offset Null
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)
Large Output Voltage Swing: 鈥?4.7 V to +14 V for
Large Output Voltage Swing:
VCC/VEE =
鹵15
V
Low Open Loop Output Impedance: 30
鈩?/div>
@ 1.0 MHz
Low THD Distortion: 0.01%
Excellent Phase/Gain Margins: 55擄/7.6 dB for Fully Compensated
Devices
ORDERING INFORMATION
(Single, Top View)
Output 1
Inputs 1
VEE
1
2
鈥?/div>
3 +
4
8
7
鈥?/div>
+
6
5
VCC
Output 2
Inputs 2
Op Amp
Function
Single
Dual
Quad
Fully
Compen-
sated
MC34081BD
MC34081BP
MC34082P
MC34084DW
MC34084P
AVCL
鈮?
Compensated
MC34080BD
MC34080BP
MC34083BP
MC34085BDW
MC34085BP
Operating
Temperature
Range
(Dual, Top View)
Package
SO鈥?
TA = 0擄 to +70擄C
70擄C
Plastic DIP
Plastic DIP
SO鈥?6L
16
14
1
1
TA = 0擄 to +70擄C
Plastic DIP
P SUFFIX
PLASTIC PACKAGE
CASE 646
PIN CONNECTIONS
Output 1
Inputs 1
3
1
2
鈥?/div>
+
鈥?/div>
+
16
15
14
13
+
鈥?/div>
+
鈥?/div>
12
11
10
9
DW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO鈥?6L)
14
Output 4
Inputs 4
VEE
Inputs 3
Output 3
NC
Output 1
Inputs 1
1
2
3
鈥?/div>
+
鈥?/div>
+
Output 4
Inputs 4
13
12
11
1
4
1
4
VCC
Inputs 2
4
5
6
VCC
Inputs 2
4
5
6
+
鈥?/div>
+
鈥?/div>
VEE
Inputs 3
Output 3
10
9
8
2
3
2
3
Output 2
NC
7
8
Output 2
7
(Quad, Top View)
漏
Motorola, Inc. 1996
Rev 0
MOTOROLA ANALOG IC DEVICE DATA
1

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