C08E 0.8碌m 5/20V CMOS Process
Full integration
of 5V and 20V
mixed signal
CMOS on the
same die serves
sophisticated
applications
such as EL
displays, CCD
drivers, and
motor controls
C08E Overview
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0.8碌m 5/20V CMOS process allowing integration of
5V CMOS with 20V CMOS鈥攃an operate with 20V
on both gate and drain.
Quadruple well
Dual-gate oxide
Double poly
Two or three layer metal process
P-type epitaxy over p+ substrate.
Features
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Full integration of 5V and 20V CMOS on the
same die
Tpd@5V = 200pS; Tpd@20V = 500pS
CMOS with 20V on gate and drain
Single and double drain extensions on 20V
NMOS and 20V PMOS
20V double poly capacitor
High Value (10k:/sq) and Low TCR poly
resistor options
Mixed signal Cadence Foundry Design Kit
(FDK) available
Applications
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EL displays
CCD Drivers
Motor Control
Instrumentation
Layout Rules
Layer
Poly 1
Poly2
Contact
Metal 1
Via
Metal 2
Via 2
Metal 3
Width (碌m)
0.8
1.0
0.9x0.9
1.1
1.0x1.0
1.2
2.0x2.0
3.0
Space (碌m)
0.9
1.2
0.8
1.0
1.0x1.0
1.1
2.0
2.4
Mixed Signal Capabilities
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20V double poly capacitor (0.84fF/碌m )
High value poly resistor option (10k:/sq)
2
5V 0.8碌m CMOS鈥?.8k gates/mm
20V CMOS with single and double extensions
Isolated vertical npn (E=70)
2
Simplified Cross-Section of 20V CMOS
2 0 V N M O S (lo w s id e )
B
S
n+
2 0 V P M O S (lo w sid e )
D
B
n+
G
N -E xt
S
p+
P-B a se
G
D
p+
P-B a se
p+
26-Sep-02
03-70-00145-00
www.dalsasemi.com
P-W e ll
n+
H V N -W e ll
p -e p ita xy
p -e p ita xy
1
1
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