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BUK581-60A Datasheet

  • BUK581-60A

  • Philips Semiconductors [PowerMOS transistor Logic level FET...

  • 60.13KB

  • PHILIPS

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Philips Semiconductors
Product Specification
PowerMOS transistor
Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode
logic level field-effect power
transistor in a plastic envelope
suitable for surface mount
applications.
The device is intended for use in
automotive and general purpose
switching applications.
BUK581-60A
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
V
GS
= 5 V
MAX.
60
1.5
1.5
150
0.40
UNIT
V
A
W
藲C
鈩?/div>
PINNING - SOT223
PIN
1
2
3
4
gate
drain
source
drain (tab)
DESCRIPTION
PIN CONFIGURATION
4
SYMBOL
d
g
1
2
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
鹵V
GS
I
D
I
D
I
DM
P
tot
T
stg
T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction Temperature
CONDITIONS
-
R
GS
= 20 k鈩?/div>
-
T
amb
= 25 藲C
T
amb
= 100 藲C
T
amb
= 25 藲C
T
amb
= 25 藲C
-
-
MIN.
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
15
1.5
1
6
1.5
150
150
UNIT
V
V
V
A
A
A
W
藲C
藲C
THERMAL RESISTANCES
SYMBOL
R
th j-sp
R
th j-amb
PARAMETER
From junction to solder point
1
From junction to ambient
CONDITIONS
Mounted on any PCB .
Mounted on PCB of Fig.18
MIN.
-
-
TYP.
14
-
MAX.
17
85
UNIT
K/W
K/W
1
Temperature measured at solder joint on drain tab.
October 1995
1
Rev 1.100

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