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BUK545-60H Datasheet

  • BUK545-60H

  • PowerMOS transistor Logic level FET

  • 8頁(yè)

  • PHILIPS

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Philips Semiconductors
Product specification
PowerMOS transistor
Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in
a plastic full-pack envelope.
The device is intended for use in
Automotive applications, Switched
Mode Power Supplies (SMPS),
motor control, welding, DC/DC and
AC/DC converters, and in general
purpose switching applications.
BUK545-60H
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
V
GS
= 5 V
MAX.
60
21
30
150
38
UNIT
V
A
W
藲C
m鈩?/div>
PINNING - SOT186
PIN
1
2
3
gate
drain
DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
d
g
source
1 2 3
case isolated
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
鹵V
GS
鹵V
GSM
I
D
I
D
I
DM
P
tot
T
stg
T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Non-repetitive gate-source
voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction Temperature
CONDITIONS
-
R
GS
= 20 k鈩?/div>
-
t
p
鈮?/div>
50
碌s
T
hs
= 25 藲C
T
hs
= 100 藲C
T
hs
= 25 藲C
T
hs
= 25 藲C
-
-
MIN.
-
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
15
20
21
13.5
82
30
150
150
UNIT
V
V
V
V
A
A
A
W
藲C
藲C
THERMAL RESISTANCES
SYMBOL
R
th j-hs
R
th j-a
PARAMETER
Thermal resistance junction to
heatsink
Thermal resistance junction to
ambient
CONDITIONS
With heatsink compound
TYP.
-
55
MAX.
4.17
-
UNIT
K/W
K/W
August 1994
1
Rev 1.000

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