Philips Semiconductors
Objective specification
Silicon Diffused Power Transistor
BUJ101AX
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended
for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor
control systems, etc.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CBO
V
CEO
I
C
I
CM
P
tot
V
CEsat
t
f
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Fall time
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
-
40
MAX.
700
700
400
0.5
1
26
1.0
100
UNIT
V
V
V
A
A
W
V
ns
T
mb
鈮?/div>
25 藲C
I
C
= 0.2 A;I
B
=20m A
Ic=0.2A,I
B1
=20mA
PINNING - SOT186A
PIN
1
2
3
base
collector
emitter
DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
c
b
1 2 3
case isolated
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
V
CBO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
PARAMETER
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
700
400
700
0.5
1
0.2
0.3
26
150
150
UNIT
V
V
V
A
A
A
A
W
藲C
藲C
T
mb
鈮?/div>
25 藲C
THERMAL RESISTANCES
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Junction to mounting base
Junction to ambient
in free air
CONDITIONS
TYP.
-
55
MAX.
4.8
-
UNIT
K/W
K/W
August 1998
1
Rev 1.000
1
2
3
4
