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BU-62843 Datasheet

  • BU-62843

  • MIL-STD-1553 Components |PCI-Enhanced Mini-ACE?

  • 366.45KB

  • 56頁

  • ETC

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BU-62743/62843/62864
PCI ENHANCED MINIATURE ADVANCED
COMMUNICATION ENGINE
(PCI ENHANCED MINI-ACE 鈩?
Make sure the next
Card you purchase
has...
廬
FEATURES
鈥?/div>
32-Bit/33MHz, 3.3Volt, PCI Target
Interface
鈥?/div>
Fully Integrated 1553A/B Notice 2,
McAir, STANAG 3838 Interface Terminal
鈥?/div>
Compatible with Enhanced Mini-ACE,
Mini-ACE (Plus) and ACE Generations
鈥?/div>
Choice of:
鈥?/div>
RT only with 4K RAM (BU-62743)
鈥?/div>
BC/RT/MT with 4K RAM (BU-62843)
鈥?/div>
BC/RT/MT with 64K RAM, with RAM
Parity (BU-62864)
Actual Size:
1.0鈥?Square Package
鈥?/div>
3.3V Logic
鈥?/div>
5V Transceiver. Available with 1760 or
McAir Compatible Options
鈥?/div>
1.0-inch square, 72-Pin Flatpack /
Formed Gull Lead Ceramic Package
鈥?/div>
Choice of 10, 12, 16, or 20MHz 1553
Clock
鈥?/div>
Highly Autonomous BC with Built-in
Message Sequence Control:
鈥?/div>
Frame Scheduling
鈥?/div>
Branching
鈥?/div>
Asynchronous Message Insertion
鈥?/div>
General Purpose Queue
鈥?/div>
User-defined Interrupts
鈥?/div>
Advanced RT Functions:
鈥?/div>
Global Circular Buffering
鈥?/div>
Interrupt Status Queue
鈥?/div>
50% Circular Buffer Rollover
Interrupts
鈥?/div>
Selective Message Monitor or
RT/Monitor
DESCRIPTION
The PCI Enhanced Mini-ACE family of MIL-STD-1553 terminals pro-
vides a complete interface between a 32-Bit / 33MHz PCI Bus and a
MIL-STD-1553 bus. These terminals integrate dual transceiver, proto-
col logic, and 4K words or 64K words of RAM.
With a 1.0-inch square package, the PCI Enhanced Mini-ACE is near-
ly 100% footprint and software compatible with the Enhanced Mini-
ACE, previous generation Mini-ACE (Plus) terminals, and is software
compatible with the older ACE series.
The PCI portion of the PCI Enhanced Mini-ACE is powered by 3.3V.
The PCI interface is NOT 5V tolerant.
Multiprotocol support of MIL-STD-1553A/B and STANAG 3838, includ-
ing versions incorporating McAir compatible transmitters, is provided.
There is a choice of 10, 12, 16, or 20 MHz 1553 clocks. The BC/RT/MT
versions with 64K words of RAM include built-in RAM parity checking.
BC features include a built-in message sequence control engine, with
a set of 20 instructions. This provides an autonomous means of
implementing multi-frame message scheduling, message retry
schemes, data double buffering, asynchronous message insertion,
and reporting to the host CPU.
The PCI Enhanced Mini-ACE RT offers the choices of single and cir-
cular buffering, along with a global circular buffering option, 50%
rollover interrupt for circular buffers, and an interrupt status queue.
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7234
漏
2002 Data Device Corporation

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