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BQ4822YMA-70 Datasheet

  • BQ4822YMA-70

  • RTC Module With 8Kx8 NVSRAM

  • 105.26KB

  • 16頁(yè)

  • TI

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bq4822Y
RTC Module With 8Kx8 NVSRAM
Features
廬
Integrated SRAM, real-time
clock, CPU supervisor, crystal,
power-fail circuit, and battery
廬
Real-Time Clock counts hun-
dredths of seconds through years
in BCD format
廬
RAM-like clock access
廬
Compatible with industry-
standard 8K x 8 SRAMs
廬
Unlimited write cycles
廬
10-year minimum data retention
and clock operation in the ab-
sence of power
廬
Automatic power-fail chip dese-
lect and write-protection
廬
Watchdog timer, power-on reset,
alarm/periodic interrupt, power-
fail and battery-low warning
廬
Automatic leap year adjustment
廬
Software clock calibration for
greater than
鹵1
minute per
month accuracy
General Description
The bq4822Y RTC Module is a non-
volatile 65,536-bit SRAM organized
as 8192 words by 8 bits with an in-
tegral real-time clock and CPU su-
pervisor. The CPU supervisor pro-
vides a programmable watchdog
timer and a microprocessor reset.
Other features include an alarm,
power-fail and periodic interrupt,
and a battery low warning.
The device combines an internal
lithium battery, quartz crystal, clock
and power-fail chip, and a full
CMOS SRAM in a plastic 28-pin
DIP module. The RTC Module di-
rectly replaces industry-standard
SRAMs and also fits into many
EPRO M and E E P R OM s o ckets
without any requirement for special
write timing or limitations on the
number of write cycles.
Registers for the real-time clock,
alarm and other special func-
tio ns ar e loc ated i n r egis ter s
1FF0h鈥?FFFh of the memory array.
The clock and alarm registers are
dual-port read/write SRAM loca-
tions that are updated once per sec-
ond by a clock control circuit from
the internal clock counters. The
dual-port registers allow clock up-
dates to occur without interrupting
normal access to the rest of the
SRAM array.
The bq4822Y also contains a power-
fail-detect circuit. The circuit dese-
lects the device whenever V
CC
falls
below tolerance, providing a high de-
gree of data security. The battery is
electrically isolated when shipped
from the factory to provide maxi-
mum battery capacity. The battery
remains disconnected until the first
application of V
CC
.
Pin Connections
RST
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
INT
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
Pin Names
A
0
鈥揂
12
CE
RST
WE
OE
DQ
0
鈥揇Q
7
INT
V
CC
V
SS
Address input
Chip enable
Microprocessor reset
Write enable
Output enable
Data in/data out
Programmable interrupt
+5 volts
Ground
28-Pin DIP Module
PN482201.eps
May 1997
1

BQ4822YMA-70 產(chǎn)品屬性

  • Clock Basics in 10 minutes or less

  • 14

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 實(shí)時(shí)時(shí)鐘

  • -

  • 時(shí)鐘/日歷

  • 警報(bào)器，閏年，監(jiān)控器，監(jiān)視計(jì)時(shí)器

  • -

  • HH:MM:SS:hh（24 小時(shí)）

  • YY-MM-DD-dd

  • 并聯(lián)

  • 4.5 V ~ 5.5 V

  • -

  • 0°C ~ 70°C

  • 通孔

  • 28-DIP 模塊（0.61"，15.49mm）

  • 28-DIP 模塊（18.42x37.72）

  • 托盤

  • 296-6532-5

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