鈥?/div>
Advanced protocol processing
processing
鈥?Single pass SSLv3 or TLSv1 record
鈥?Support for SSLv2 record processing
鈥?Full key derivation for SSLv2, SSLv3, and TLSv1
鈥?Finished message processing for SSLv3 and TLSv1
鈥?Client certificate verify for SSLv3 and TLSv1
鈥?/div>
Extensive software eases system integration
鈥?Complete, multi-platform driver support
鈥?High level protocol function API
鈥?All libraries provided with portable source code
鈥?Future proof with common SSL software roadmap
storage
鈥?/div>
Local state
attached DDR SDRAM
鈥?0-512 MB
鈥?Accessed and updated for each record
interfaces allow rapid
鈥?/div>
Flexible
transport provides seamless
development
processors
鈥?Hyper
IF to broadband
鈥?PCI-X, PCI for server platform
鈥?/div>
鈥?3DES-CBC, DES-CBC, DES40-CBC
IETF and FIPS compatible algorithms
鈥?ARCFOUR (40-bit, 56-bit, 128-bit)
鈥?NULL
鈥?AES-CBC (128-bit block鈥?28, 192 and 256-bit keys)
鈥?MD5, SHA-1, MD5-HMAC, SHA-1-HMAC
鈥?TLSv1 PRF
鈥?/div>
Highest performance SSL processing enables security
in high-bandwidth applications
鈥?Load balancers
鈥?Layer 4-7 switches
鈥?SSL appliances
鈥?Caching appliances
鈥?Chassis based servers
鈥?Web servers/proxies
鈥?/div>
High performance interfaces
PCI 2.2
鈥?PCI-X 1.0, 32/64 bit 33/66 MHz
鈥?400 MHz 8-bit single-end Hyper Transport (HT)
鈥?/div>
Scales to large systems without degradation
鈥?Supports low overhead context switching
鈥?Supports hundreds of thousands of concurrent connections
鈥?/div>
Package
鈥?480-pin EBGA
鈥?/div>
Technology
鈥?0.18碌 low power CMOS
SSL Applications Using the BCM5850
X86-based CPU
BCM1250-based CPU
X86 CPU
PCI-X
BCM5821
BCM1250
HT
BCM5821
BCM5850
SSL Record
Processing
BCM5850
SSL Record
Processing
Memory
Memory
BCM5850相關(guān)型號PDF文件下載
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