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BCM5700 Datasheet

  • BCM5700

  • PCI - X 10/100/1000 BASE -T CONTROLLER

  • 154.84KB

  • 2頁(yè)

  • ETC

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BCM5700
PRODUCT
Brief
O F
B E N E F I T S
BCM5700 PCI-X 10/100/1000BASE-T CONTROLLER
B C M 5 7 0 0
F E AT U R E S
S U M M A R Y
鈥?/div>
10/100/1000 Mbps tri-speed media access controller (MAC)
with wire speed performance at all rates
鈥?/div>
Support for PCI v2.2, 32/64-bit, 33/66 MHz, and PCI-X v1.0
32/64-bit, 66/133-MHz bus interfaces
鈥?/div>
96 KB ultra-deep packet buffer with support for up to 16 MB
externally
鈥?/div>
Support for IEEE 802.3, 802.3u, 802.3z, and 802.3ab
standards
鈥?/div>
MII/GMII and TBI (SerDes style) transceiver interfaces
features include: TCP/UDP/IP
鈥?/div>
Advanced CPU offload segmentation, 9 KB jumbo frame
checksum offload, TCP
鈥?/div>
Dual high-speed CPUs
PC99 compliant: support for ACPI ver
鈥?/div>
MicrosoftPXE version 2.0, and statistics for SNMP 1.1a, Wake
on LAN,
MIB II,
鈥?/div>
Features wire speed operation at all speeds.
ideal for new high-speed network interface
鈥?/div>
The BCM5700 is LAN on Motherboard (LOM) applications,
cards (NIC) and
the
and PCI-X
enables
鈥?/div>
Support for both run PCI 2.2PCI-based orstandardsystems.
the BCM5700 to
in any
PCI-X
packet buffer allows the
鈥?/div>
The ultra-deep on-chipand receive at high speedsBCM5700 to
continuously transmit
in systems
while maintaining backward compatibility with today鈥檚
networks.
鈥?/div>
On-chip CPUs perform advanced functions and allow the
BCM5700 to evolve with new standards. The CPUs also
features promote
鈥?/div>
Advanced offloadCPU utilization. high throughput, while
minimizing host
鈥?/div>
Combined with the BCM5401 and newer BroadcomACPI-
10/100/1000BASE-T PHYs, the BCM5700 supports
compliant Wake on LAN implementations.
provide advanced packet parsing capabilities, making the
BCM5700 an OSI L4 protocol aware device, providing many
advanced features and offloads.
where the PCI/PCI-X bus is shared with other devices.
鈥?/div>
Layer 2 priority encoding (802.3p) (up to 16 priority queues)
鈥?/div>
VLAN tagging (IEEE 802.3q)
鈥?/div>
Flow control (IEEE 802.3x)
鈥?/div>
Link aggregation (IEEE802.3ad)
鈥?/div>
Multiple power modes with programmable low power
operation
鈥?/div>
Low power design 鈥?3.3 V/1.8 V, 0.18 碌m CMOS
鈥?/div>
5V tolerant PCI I/Os
鈥?/div>
388-pin PBGA package
Ethernet-like MIB, and Ethernet MIB (802.3z, Clause 30)
manageability features enable NIC
鈥?/div>
Additionalcomply with relevant manageability and LOM for
designs to
standards
power operation鈥?.18 碌m advanced
鈥?/div>
Provides lowcombined with programmable power process
technology,
management.
server and desktop applications.
BCM5700 10/100/1000 PCI-X NIC Reference Design

BCM5700相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    10/100 BASE-TX QUAD TRANSCEIVER
    ETC
  • 英文版
    10/100 BASE-TX QUAD TRANSCEIVER
  • 英文版
    10/100BASE-TX SINGLE-CHANNEL SIGNI-PHY-TM TRANSCEIVER
    BOARDCOM [...
  • 英文版
    10/100BASE TX SINGLE CHANNEL SIGNI PHY TRANSCEIVER
    ETC
  • 英文版
    10/100BASE TX SINGLE CHANNEL SIGNI PHY TRANSCEIVER
  • 英文版
    10/100BASE-TX DUAL-PORT DIGI-PHYTM TRANSCEIVER
    ETC
  • 英文版
    10/100BASE-TX DUAL-PORT DIGI-PHYTM TRANSCEIVER
  • 英文版
    10/100 BASE TX/FX HEX TRANSCEIVER
    ETC
  • 英文版
    10/100 BASE TX/FX HEX TRANSCEIVER
  • 英文版
    10/100 BASE - TX/FX OCTAL TRANSCEIVER
    ETC
  • 英文版
    10/100 BASE - TX/FX OCTAL TRANSCEIVER
  • 英文版
    10/100BASE TX OCTAL TRANSCEIVER
    ETC
  • 英文版
    10/100BASE TX OCTAL TRANSCEIVER
  • 英文版
    10/100BASE-TX Single-Channel Transceiver
    Broadcom
  • 英文版
    StrataXGS TM INTEGRATED MULTI-LAYER SWITCH
    BOARDCOM [...
  • 英文版
    5-PORT 10/100 SWITCH WITH ON-CHIP PACKET BUFFER
    ETC
  • 英文版
    5-PORT 10/100 SWITCH WITH ON-CHIP PACKET BUFFER
  • 英文版
    8 PORT 10/100 SWITCH ON CHIP PACKET BUFFER
    ETC
  • 英文版
    8 PORT 10/100 SWITCH ON CHIP PACKET BUFFER
  • 英文版
    8 PORT 10/100 SWITCH WITH ON CHIP PACKET
    ETC

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