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AWT6308R Datasheet

  • AWT6308R

  • PCS/CDMA 3.4V/28dBm Linear Power Amplifier Module

  • 176.54KB

  • 8頁(yè)

  • ANADIGICS   ANADIGICS

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AWT6308R
PCS/CDMA 3.4V/28dBm
Linear Power Amplifier Module
FEATURES
鈥?/div>
鈥?/div>
InGaP HBT Technology
High Efficiency:
19 % @ +16 dBm output
40 % @ +28 dBm output
Low Quiescent Current: 16 mA
Low Leakage Current in Shutdown Mode: <1
碌A(chǔ)
Internal Voltage Regulation
Optimized for a 50
鈩?/div>
System
Low Profile Miniature Surface Mount Package:
1 mm
CDMA 1XRTT, 1xEV-DO Compliant
Pinout Enables Easy Phone Board Migration
From 4 mm x 4 mm Package
RoHS-Compliant Package, 250 C MSL-3
o
PRELIMINARY DATA SHEET - Rev 1.0
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
AW
T63
08R
APPLICATIONS
鈥?/div>
CDMA Wireless Handsets and Data Devices
M9 Package
8 Pin 3 mm x 3 mm x 1 mm
Surface Mount Module
PRODUCT DESCRIPTION
The AWT6308R meets the increasing demands for
higher efficiency and smaller footprint in CDMA 1X
handsets. The package pinout was chosen to
enable handset manufacturers to switch from a
4 mm x 4 mm PA module with few layout changes
while reducing board area requirements by 44%.
The AWT6308R uses ANADIGICS鈥?exclusive InGaP-
Plus鈩?technology, which combines HBT and
pHEMT devices on the same die, to enable state-of-
the-art reliability, temperature stability, and
ruggedness. The AWT6308R is part of ANADIGICS鈥?/div>
High-Efficiency-at-Low-Power (HELP鈩? family of
CDMA power amplifiers, which deliver low quiescent
currents and significantly greater efficiency without
a costly external DAC or DC-DC converter. Through
selectable bias modes, the AWT6308R achieves
optimal efficiency across different output power
levels, specifically at low- and mid-range power
levels where the PA typically operates, thereby
dramatically increasing handset talk-time and
standby-time. Its built-in voltage regulator eliminates
the need for external voltage regulation
components. The 3 mm x 3 mm x 1 mm surface mount
package incorporates matching networks optimized
for output power, efficiency, and linearity in a 50
鈩?/div>
system.
GND at slug (pad)
V
BATT
1
8
V
CC
RF
IN
2
7
RF
OUT
V
MODE
3
Bias Control
6
GND
V
EN
4
5
GND
Figure 1: Block Diagram
03/2006

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