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ATUSBFUNC-SS7211 Datasheet

  • ATUSBFUNC-SS7211

  • ASIC

  • 9頁

  • ETC

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Features
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USB 1.1-compliant
Approximately 6.5K Gates
Supports 12 Mbps Transfers Only
Functionally Compatible with Open HCI and UHCI
Modular Design for Ease of Integration
Supports Control, Interrupt, Bulk and Isochronous Transfers
Four Configurable Endpoints
Complete Error Handling Capability
Automatic Data Retry in Hardware
Flexible Application Interface
Supports Power Management
Block Diagram
USB
Function Core
High-speed,
12 Mbps
EP0
Block
To RAM
SIE
D
P
L
XCVR
L
Clk_4x
USB Engine
Application
Interface
ATUSBFUNC-
SS7211
Summary
To Application
Overview
The ATUSBFUNC-SS7211 is a fully synthesizable core that can be implemented in
any Atmel ASIC library (gate array or standard cell). The core is supported by a com-
prehensive USB test environment (ATUSBTEST-SS7400) that can be used to verify
the entire design, including the application. The USB Function Core can be used in
any high-speed (12 Mbps) application, such as a printer, camera or scanner. The core
is configured before synthesis to respond to all standard USB hub/host commands.
Up to four endpoints are supported. The interface to the application consists of an
application interface and a FIFO interface. There are no user programmable registers
in this core. The internal state machine and control logic decode the hub/host com-
mands and control the data transfers across the FIFO interface. Control signals are
used to transfer error and status information to or from the application.
Rev. 1668AS鈥?7/01
Note: This is a summary document. A complete document is avail-
able under NDA. For more information, please contact your local
1
Atmel sales office.

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