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ATC25 Datasheet

  • ATC25

  • Cell-based ASIC

  • 11頁

  • ATMEL   ATMEL

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Features
鈥?/div>
Comprehensive Library of Standard Logic Cells
鈥?/div>
ATC25 I/O Cells Designed to Operate with V
DD
= 2.5V 鹵 0.25V as Main Target Operating
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Conditions
IO33 Pad Library Provides Interface to 3V Environment
Oscillators Provide Stable Clock Sources
Basic Analog Input/Output, Power, Ground and Multiplexer Cells Available,
High-performance Analog Cells Can Be Developed on Request
Memory Cells Compiled to the Precise Requirements of the Design
Compatible with Atmel鈥檚 Extensive Range of Microcontroller, DSP, Standard Interface
and Application Specific Cells
Cell-based ASIC
ATC25
Summary
Description
The Atmel ATC25 CBIC family is fabricated on a proprietary 0.25 micron five-layer-
metal CMOS process intended for use with a supply voltage of 2.5V 鹵 0.25V. The fol-
lowing table shows the range for which Atmel library cells have been characterized.
Table 1.
Recommended Operating Conditions
Symbol
V
DD
V
DD3
V
I
V
O
TEMP
Parameter
DC Supply Voltage
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Free Air
Temperature Range
Industrial
Conditions
Core and Standard I/Os
3V Interface I/Os
Min
2.25
3
0
0
-40
Typ
2.5
3.3
Max
2.75
3.6
V
DD
V
DD
+85
Unit
V
V
V
V
C
The Atmel cell libraries and megacell compilers have been designed in order to be
compatible with each other. Simulation representations exist for three types of operat-
ing conditions; they correspond to three characterization conditions defined as follows:
鈥?/div>
MIN conditions:
T
J
= -40擄C
V
DD
(cell) = 2.75V
Process = fast (industrial best case)
鈥?/div>
TYP conditions:
T
J
= +25擄C
V
DD
(cell) = 2.5V
Process = typ (industrial typical case)
鈥?/div>
MAX conditions:
T
J
= +100擄C
V
DD
(cell) = 2.25V
Process = slow (industrial worst case)
Delays to tri-state are defined as delay to turn off (VGS < VT) of the driving devices.
Output pad drain current corresponds to the output current of the pad when the output
voltage is V
OL
or V
OH
. The output resistor of the pad and the voltage drop due to
access resistors (in and out of the die) are taken into account. In order to have accu-
rate timing estimates, all characterization has been run on electrical netlists extracted
from the layout database.
Rev. 1306DS鈥揅BIC鈥?9/02
1

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